Patents by Inventor Myung-hun Lee

Myung-hun Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240371876
    Abstract: A semiconductor device includes a substrate having a first power supply region, a second power supply region, and a cell region therein. The cell region extends between the first power supply region and the second power supply region. A first active region and a second active region are provided, which extend side-by-side within the cell region. A first power supply wiring is provided, which extends in the first direction within the first power supply region. A first source/drain contact is provided, which connects the first active region and the second active region. A second source/drain contact is provided, which connects the first active region and the first power supply wiring. The first source/drain contact includes a first recess portion disposed inside an intermediate region between the first active region and the second active region.
    Type: Application
    Filed: July 17, 2024
    Publication date: November 7, 2024
    Inventors: Deok Han Bae, Ju Hun Park, Myung Yoon Um, Ye Ji Lee, Yoon Young Jung
  • Publication number: 20240346681
    Abstract: A electronic device and method for providing store payment service are provided. An electronic device for providing store payment service comprising a processor; and a memory operatively coupled to the processor, wherein the memory, when executed, causes the processor to identify first tracking data of the tracking data corresponding to a first time period including the trigger time point, identify a user candidate group for at least some of the at least one user based on the first tracking data, calculate a first reliability for each of the at least some users included in the user candidate group, identify that a user related to the trigger is a first user based on the first reliability, and store instructions for performing an update related to the trigger for a virtual shopping cart of the first user.
    Type: Application
    Filed: October 26, 2023
    Publication date: October 17, 2024
    Applicant: FAINDERS.AI INC.
    Inventors: Suk Bum HONG, Myung Won HAM, Byung Hun LEE, Su Min LIM, Sung Bin PARK, Ji Hyun KIM, Hyung Jun AHN
  • Patent number: 12109806
    Abstract: Provided are an inkjet printing apparatus and a method for inspecting an inkjet head using same. The inkjet printing apparatus comprises: an inspection stage unit on which an inspection substrate is seated; an inkjet head unit including at least one inkjet head that ejects ink containing dipoles and a solvent in which the dipoles disperse, on the inspection stage unit; and a particle count inspection unit that is located so as to be spaced apart from the inkjet head unit in one direction. The particle count inspection unit comprises: a first heat treatment unit that is located on the top portion of the inspection stage unit; and a first sensing unit that is located on the bottom portion of the inspection stage unit and measures the number of dipoles sprayed onto the inspection substrate.
    Type: Grant
    Filed: June 2, 2020
    Date of Patent: October 8, 2024
    Assignee: Samsung Display Co., Ltd.
    Inventors: Byung Chul Lee, Heung Cheol Jeong, Myung Soo Huh, Cheol Lae Roh, Do Hun Lee
  • Publication number: 20240323358
    Abstract: A method and apparatus for video coding utilize a template matching-based secondary MPM list. The video coding method and the apparatus generate a secondary most probable mode (MPM) list according to a gradient-based template matching result and utilize the secondary MPM list for intra prediction of the current block for improving video coding efficiency and enhancing video quality.
    Type: Application
    Filed: June 6, 2024
    Publication date: September 26, 2024
    Inventors: Myung Oh Hong, Min Hun Lee, Dong Gyu Sim, Jin Heo, Seung Wook Park
  • Patent number: 12094976
    Abstract: A semiconductor device includes a first fin-shaped pattern which extends lengthwise in a first direction, a second fin-shaped pattern which is spaced apart from the first fin-shaped pattern in a second direction and extends lengthwise in the first direction, a first gate electrode extending lengthwise in the second direction on the first fin-shaped pattern, a second gate electrode extending lengthwise in the second direction on the second fin-shaped pattern, a first gate separation structure which separates the first gate electrode and the second gate electrode and is at the same vertical level as the first gate electrode and the second gate electrode, and a first source/drain contact extending lengthwise in the second direction on the first fin-shaped pattern and the second fin-shaped pattern.
    Type: Grant
    Filed: December 22, 2021
    Date of Patent: September 17, 2024
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Deok Han Bae, Ju Hun Park, Myung Yoon Um, Yu Ri Lee, In Yeal Lee
  • Publication number: 20240297983
    Abstract: A method and apparatus for video coding use implicit arbitrary block partitioning and prediction according to the implicit arbitrary block partitioning. The video coding method and the apparatus implicitly determine partitioned regions of a current block based on information on previously reconstructed neighboring reference regions. The video coding method and the apparatus generate predicted signals of the partitioned regions to improve video coding efficiency and to enhance video quality.
    Type: Application
    Filed: May 9, 2024
    Publication date: September 5, 2024
    Inventors: Dong Gyu Sim, Min Hun Lee, Myung Oh Hong, Jin Heo, Seung Wook Park
  • Patent number: 12068323
    Abstract: A semiconductor device includes a substrate having a first power supply region, a second power supply region, and a cell region therein. The cell region extends between the first power supply region and the second power supply region. A first active region and a second active region are provided, which extend side-by-side within the cell region. A first power supply wiring is provided, which extends in the first direction within the first power supply region. A first source/drain contact is provided, which connects the first active region and the second active region. A second source/drain contact is provided, which connects the first active region and the first power supply wiring. The first source/drain contact includes a first recess portion disposed inside an intermediate region between the first active region and the second active region.
    Type: Grant
    Filed: October 27, 2021
    Date of Patent: August 20, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Deok Han Bae, Ju Hun Park, Myung Yoon Um, Ye Ji Lee, Yoon Young Jung
  • Publication number: 20240155844
    Abstract: A semiconductor memory device includes a mold structure including gate electrodes stacked on a first substrate, a channel structure that penetrates a first region of the mold structure to cross the gate electrodes, a first through structure that penetrates a second region of the mold structure, and a second through structure that penetrates a third region of the mold structure. The mold structure further includes memory cell blocks extending in a first direction and spaced apart in a second direction, and a dummy block extending in the first direction and disposed between the memory cell blocks. Each of the memory cell blocks and the dummy block includes a cell region and an extension region arranged in the first direction. The first region is the cell region of one of the memory cell blocks, the second region is the extension region of the one of the memory cell blocks, and the third region is the extension region of the dummy block.
    Type: Application
    Filed: January 17, 2024
    Publication date: May 9, 2024
    Inventors: Myung Hun Lee, Dong Ha Shin, Pan Suk Kwak, Dae Seok Byeon
  • Patent number: 11950425
    Abstract: A mold structure includes gate electrodes stacked on a first substrate, a channel structure penetrating a first region of the mold structure to cross the gate electrodes, a first through structure penetrating a second region of the mold structure, and a second through structure penetrating a third region of the mold structure. The mold structure includes memory cell blocks extending in a first direction and spaced apart in a second direction, and a dummy block extending in the first direction and disposed between the memory cell blocks. Each of the memory cell and dummy blocks includes a cell region and an extension region arranged in the first direction. The first region is the cell region of one of the memory cell blocks, the second region is the extension region of the one of the memory cell blocks, and the third region is the extension region of the dummy block.
    Type: Grant
    Filed: May 6, 2021
    Date of Patent: April 2, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Myung Hun Lee, Dong Ha Shin, Pan Suk Kwak, Dae Seok Byeon
  • Patent number: 11679134
    Abstract: The present invention relates to a pharmaceutical composition, a food composition, and a food additive for the prevention and treatment or improvement of muscle loss, muscle weakness, and muscle atrophy, which contain Enterococcus faecalis, particularly Enterococcus faecalis EF-2001 among others, a culture solution thereof, or a killed body thereof as an active ingredient. Killed Enterococcus faecalis EF-2001 of the present invention exhibits a remarkable treatment effect for muscle loss, muscle weakness, and muscle atrophy by inhibiting the damage to muscle cells induced by oxidative stress, and thus killed lactic acid bacterium Enterococcus faecalis EF-2001 of the present invention or a culture solution thereof can be usefully used as an active ingredient in a pharmaceutical composition, a food composition, and a food additive for prevention of muscle atrophy and sarcopenia.
    Type: Grant
    Filed: October 18, 2017
    Date of Patent: June 20, 2023
    Assignees: KOREA BERM CO., LTD., UNIVERSITY INDUSTRY FOUNDATION, YONSEI UNIVERSITY WONJU CAMPUS, NIHON BERUMU CO., LTD.
    Inventors: Tack Joong Kim, Myung Hun Lee, Masahiro Iwasa, Kwon il Han, Wan Jae Kim
  • Patent number: 11493521
    Abstract: Exemplary embodiments of the present invention relate to rapidly and easily test initial liver disease and more particularly to a monoclonal antibody for ?1-acid glycoprotein, a diagnosis kit for tracking progressive chronic hepatitis and liver fibrosis in an initial phase of liver disease by measuring the concentration of asialo-?1-acid glycoprotein (AsAGP) as a hepatocyte injury marker in a sample using the antibody, and a use thereof. Further, embodiments of the present invention provide a kit for specifically determining the degree of progressive chronic hepatitis and hepatic fibrosis from a blood sample and an immunochromatography strip, comprising a HRP-RCA II (Ricinus communis agglutinin II) conjugate or a Gold-RCA II conjugate specifically binding to asialo ?-1 acid glycoprotein.
    Type: Grant
    Filed: January 18, 2020
    Date of Patent: November 8, 2022
    Inventors: WangJo Cha, Hyunhyo Suh, Mikyung Chung, Jae-hyun Cho, Mi Sook Jeong, Dahee Yoon, Myung Hun Lee, Sunghong Kim, Pil Sang Park
  • Publication number: 20220190131
    Abstract: A nonvolatile memory device includes a peripheral logic structure including a peripheral circuit on a substrate, a horizontal semiconductor layer extending along an upper surface of the peripheral logic structure, stacked structures arranged in a first direction on the horizontal semiconductor layer and including interlayer insulating films and conductive films alternately stacked in a direction perpendicular to the substrate, a first opening disposed between the stacked structures and included in the horizontal semiconductor layer to expose a part of the peripheral logic structure and a second opening arranged in a second direction, which differs from the first direction, from the first opening, included in the horizontal semiconductor layer, and disposed adjacent to the first opening. The peripheral logic structure includes a control transistor overlapping the second opening in a plan view and controlling operation of the plurality of stacked structures.
    Type: Application
    Filed: August 23, 2021
    Publication date: June 16, 2022
    Inventors: Kyung Min KO, Myung Hun LEE, Pan Suk KWAK, Dae Seok BYEON
  • Publication number: 20220157845
    Abstract: A non-volatile memory chip comprises a cell region that includes a first surface, a second surface opposite to the first surface, a first cell structure, and a second cell structure spaced apart from the first cell structure; a peripheral circuit region on the first surface of the cell region, and that includes a first peripheral circuit connected to the first cell structure, a second peripheral circuit connected to the second cell structure, and a connection circuit between the first and second peripheral circuits; a through via between the first and second cell structures and that extends from the second surface of the cell region to the connection circuit of the peripheral circuit region; a redistribution layer that covers the through via on the second surface of the cell region, is connected to the through via, and extends along the second surface; and a chip pad connected to the redistribution layer.
    Type: Application
    Filed: July 26, 2021
    Publication date: May 19, 2022
    Inventors: MIN JAE LEE, Jin Do Byun, Young-Hoon Son, Young Don Choi, Pan Suk Kwak, Myung Hun Lee, Jung Hwan Choi
  • Publication number: 20220115394
    Abstract: A semiconductor memory device includes a mold structure including gate electrodes stacked on a first substrate, a channel structure that penetrates a first region of the mold structure to cross the gate electrodes, a first through structure that penetrates a second region of the mold structure, and a second through structure that penetrates a third region of the mold structure. The mold structure further includes memory cell blocks extending in a first direction and spaced apart in a second direction, and a dummy block extending in the first direction and disposed between the memory cell blocks. Each of the memory cell blocks and the dummy block includes a cell region and an extension region arranged in the first direction. The first region is the cell region of one of the memory cell blocks, the second region is the extension region of the one of the memory cell blocks, and the third region is the extension region of the dummy block.
    Type: Application
    Filed: May 6, 2021
    Publication date: April 14, 2022
    Inventors: MYUNG HUN LEE, DONG HA SHIN, PAN SUK KWAK, DAE SEOK BYEON
  • Publication number: 20210132082
    Abstract: Exemplary embodiments of the present invention relate to rapidly and easily test initial liver disease and more particularly to a monoclonal antibody for ?1-acid glycoprotein, a diagnosis kit for tracking progressive chronic hepatitis and liver fibrosis in an initial phase of liver disease by measuring the concentration of asialo-?1-acid glycoprotein (AsAGP) as a hepatocyte injury marker in a sample using the antibody, and a use thereof. Further, embodiments of the present invention provide a kit for specifically determining the degree of progressive chronic hepatitis and hepatic fibrosis from a blood sample and an immunochromatography strip, comprising a HRP-RCA II (Ricinus communis agglutinin II) conjugate or a Gold-RCA II conjugate specifically binding to asialo ?-1 acid glycoprotein.
    Type: Application
    Filed: January 18, 2020
    Publication date: May 6, 2021
    Inventors: WangJo Cha, Hyunhyo Suh, Mikyung Chung, Jae-hyun Cho, Mi Sook Jeong, Dahee Yoon, Myung Hun Lee, Sunghong Kim, Pil Sang Park
  • Publication number: 20210046127
    Abstract: The present invention relates to a pharmaceutical composition, a food composition, and a food additive for the prevention and treatment or improvement of muscle loss, muscle weakness, and muscle atrophy, which contain Enterococcus faecalis, particularly Enterococcus faecalis EF-2001 among others, a culture solution thereof, or a killed body thereof as an active ingredient. Killed Enterococcus faecalis EF-2001 of the present invention exhibits a remarkable treatment effect for muscle loss, muscle weakness, and muscle atrophy by inhibiting the damage to muscle cells induced by oxidative stress, and thus killed lactic acid bacterium Enterococcus faecalis EF-2001 of the present invention or a culture solution thereof can be usefully used as an active ingredient in a pharmaceutical composition, a food composition, and a food additive for prevention of muscle atrophy and sarcopenia.
    Type: Application
    Filed: October 18, 2017
    Publication date: February 18, 2021
    Inventors: Tack Joong KIM, Myung Hun LEE, Masahiro IWASA, Kwon il HAN, Wan Jae KIM
  • Patent number: 9729797
    Abstract: A shutter lag from when a shutter button is fully pressed to when an exposure is actually performed may be reduced by performing a precedence operation for a state transition of a shutter when the shutter button is half pressed.
    Type: Grant
    Filed: November 4, 2014
    Date of Patent: August 8, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Myung-hun Lee
  • Patent number: 9258496
    Abstract: A digital photographing apparatus and a method of controlling the same. A continuous shooting speed of the digital photographing apparatus may be improved by simultaneously performing a shutter operation and a read out operation of image data. A disclosed method of controlling a digital photographing apparatus includes displaying an image signal input through an image pickup device as a live view image, performing a first operation by driving a shutter, reading data from the image pickup device, and performing a second operation by driving the shutter during a time period overlapping the reading of the data.
    Type: Grant
    Filed: November 14, 2014
    Date of Patent: February 9, 2016
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: Myung-hun Lee
  • Patent number: 9215370
    Abstract: A digital photographing apparatus and a method of controlling the same to increase continuous shooting speed for capturing panoramic photographs. A provided method includes when a plurality of images are captured from an image pickup device during a predetermined period of time to generate a panoramic image, capturing at least one image from among the plurality of images by reading, from the image pickup device, image data corresponding to a predetermined region of a preview image displayed on the digital photographing apparatus, wherein a first number of the plurality of images is greater than a second number of images captured by reading, from the image pickup device, second image data corresponding to an entire region of the preview image during the predetermined period of time.
    Type: Grant
    Filed: November 18, 2011
    Date of Patent: December 15, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Myung-hun Lee
  • Patent number: 9154758
    Abstract: A digital signal processor and a digital image processing apparatus adopting the same. The digital signal processor comprises a data converter, which converts digital image data in red, green, and blue form to digital image data in luminance and chrominance form, such that when photograph-image data is captured by photographing, the data converter processes the photograph-image data during each period of time from the time when processing of one frame data of live-view is completed to the time when processing of next frame data begins.
    Type: Grant
    Filed: March 3, 2008
    Date of Patent: October 6, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Myung-hun Lee