Patents by Inventor N. Gopalan Nair

N. Gopalan Nair has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6195733
    Abstract: A multiprocessor data processing system includes a private data bus and a private program bus coupled to each of the processors. Coupled between the private data buses is a plurality of memory banks, each of which can be dynamically switched between the processors to move blocks of data without physically transferring the data from one bank to another. Likewise, a plurality of memory banks is coupled between the program buses. These memory banks are loaded with pages of program instructions from external memory over a shared bus. Any one of the pages can be coupled to either of the processors on its respective private program bus. When the pages are coupled to the shared bus, they appear as a contiguous address space. When a page is coupled to one of the private program buses, the addressing mode is changed so that the page is mapped to a common address space.
    Type: Grant
    Filed: October 21, 1998
    Date of Patent: February 27, 2001
    Assignee: Intel Corporation
    Inventors: N. Gopalan Nair, David Regenold, Parviz Hatami, Ramprasad Satagopan
  • Patent number: 5890013
    Abstract: A multiprocessor data processing system includes a private data bus and a private program bus coupled to each of the processors. Coupled between the private data buses is a plurality of memory banks, each of which can be dynamically switched between the processors to move blocks of data without physically transferring the data from one bank to another. Likewise, a plurality of memory banks is coupled between the program buses. These memory banks are loaded with pages of program instructions from external memory over a shared bus. Any one of the pages can be coupled to either of the processors on its respective private program bus. When the pages are coupled to the shared bus, they appear as a contiguous address space. When a page is coupled to one of the private program buses, the addressing mode is changed so that the page is mapped to a common address space.
    Type: Grant
    Filed: September 30, 1996
    Date of Patent: March 30, 1999
    Assignee: Intel Corporation
    Inventors: N. Gopalan Nair, David Regenold, Parviz Hatami, Ramprasad Satagopan
  • Patent number: 5862491
    Abstract: A method of using control channel information is provided to enhance data throughput of a cellular communication system. The cellular communication system includes a single system control unit coupled to a data pump, a cellular transceiver and a radio transceiver. A method of operating the cellular communication system includes the following steps: (a) detecting a control channel signal indicating that a channel interruption is to occur; (b) decoding the control channel signal; (c) sending the decoded control channel signal to the system control unit; (d) controlling the parameters of the adaptive components of the data pump so that the parameters remain at a converged state or are adjusted even during the channel interruption; (e) interrupting the channel; and (f) re-establishing the channel within a reduced retraining time period.
    Type: Grant
    Filed: October 13, 1997
    Date of Patent: January 19, 1999
    Assignee: Intel Corporation
    Inventors: N. Gopalan Nair, Zdenek A. Brun
  • Patent number: 5696699
    Abstract: A cellular communication system having all of its components operating under a single system control unit is provided so that the various components of the system can be adjusted as the parameters of the other components or the dynamic characteristics of the cellular channel change.
    Type: Grant
    Filed: February 13, 1995
    Date of Patent: December 9, 1997
    Assignee: Intel Corporation
    Inventor: N. Gopalan Nair