Patents by Inventor Nadeemullah A. Mahadik

Nadeemullah A. Mahadik has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220406591
    Abstract: Described herein is a method for growing indium nitride (InN) materials by growing hexagonal InN using a pulsed growth method at a temperature lower than 300° C.
    Type: Application
    Filed: August 3, 2022
    Publication date: December 22, 2022
    Inventors: Neeraj Nepal, Charles R. Eddy, JR., Nadeemullah A. Mahadik, Syed B. Qadri, Michael J. Mehl
  • Patent number: 11443942
    Abstract: Described herein is a method for growing indium nitride (InN) materials by growing hexagonal and/or cubic InN using a pulsed growth method at a temperature lower than 300° C. Also described is a material comprising InN in a face-centered cubic lattice crystalline structure having an NaCl type phase.
    Type: Grant
    Filed: September 7, 2017
    Date of Patent: September 13, 2022
    Assignee: The Government of the United States of America, as represented by the Secretary of the Navy
    Inventors: Neeraj Nepal, Charles R. Eddy, Jr., Nadeemullah A. Mahadik, Syed B. Qadri, Michael J. Mehl
  • Patent number: 11171055
    Abstract: A method of cleaving includes providing a substrate. Optionally, the substrate includes ?-gallium oxide, hexagonal zinc sulfide, or magnesium selenide. The substrate includes at least one natural cleave plane and a crystallinity. The substrate is cleaved along a first natural cleave plane of the at least one natural cleave plane. The cleaving the substrate along the first natural cleave plane includes the following. A micro-crack is generated in the substrate while maintaining the crystallinity adjacent to the micro-crack by generating a plurality of phonons in the substrate, the micro-crack comprising a micro-crack direction along the first natural cleave plane. The micro-crack is propagated along the first natural cleave plane while maintaining the crystallinity adjacent to the micro-crack. Optionally, generating a micro-crack in the substrate by generating a plurality of phonons in the substrate includes generating the plurality of phonons by electron-hole recombination.
    Type: Grant
    Filed: January 30, 2020
    Date of Patent: November 9, 2021
    Assignee: The Government of the United States of America, as represented by the Secretary of the Navy
    Inventors: Nadeemullah A. Mahadik, Robert E. Stahlbush, Marko J. Tadjer, Karl D. Hobart, Francis J. Kub
  • Publication number: 20210296524
    Abstract: A method of growing fully relaxed SiGeSn buffer layers on Si substrates to produce virtual substrates for the epitaxial growth of high quality GeSn films suitable for high performance infrared (IR) optoelectronic device technology directly integrated on silicon. Growing the SiGeSn virtual substrate uses a precisely decreasing growth temperature and Si flux and a precisely increasing Ge and Sn flux. The virtual substrates may have a slightly larger lattice constant than that of the target GeSn alloy to impose a precise degree of tensile strain resulting in a direct band gap for the target GeSn alloy.
    Type: Application
    Filed: March 22, 2021
    Publication date: September 23, 2021
    Inventors: Glenn G. Jernigan, Mark E. Twigg, Nadeemullah A. Mahadik, Jill A. Nolde
  • Publication number: 20200294792
    Abstract: Described herein is a method for growing indium nitride (InN) materials by growing hexagonal and/or cubic InN using a pulsed growth method at a temperature lower than 300° C. Also described is a material comprising InN in a face-centered cubic lattice crystalline structure having an NaCl type phase.
    Type: Application
    Filed: June 1, 2020
    Publication date: September 17, 2020
    Inventors: Neeraj Nepal, Charles R. Eddy, Jr., Nadeemullah A. Mahadik, Syed B. Qadri, Michael J. Mehl
  • Publication number: 20200251389
    Abstract: A method of cleaving includes providing a substrate. Optionally, the substrate includes ?-gallium oxide, hexagonal zinc sulfide, or magnesium selenide. The substrate includes at least one natural cleave plane and a crystallinity. The substrate is cleaved along a first natural cleave plane of the at least one natural cleave plane. The cleaving the substrate along the first natural cleave plane includes the following. A micro-crack is generated in the substrate while maintaining the crystallinity adjacent to the micro-crack by generating a plurality of phonons in the substrate, the micro-crack comprising a micro-crack direction along the first natural cleave plane. The micro-crack is propagated along the first natural cleave plane while maintaining the crystallinity adjacent to the micro-crack. Optionally, generating a micro-crack in the substrate by generating a plurality of phonons in the substrate includes generating the plurality of phonons by electron-hole recombination.
    Type: Application
    Filed: January 30, 2020
    Publication date: August 6, 2020
    Inventors: NADEEMULLAH A. MAHADIK, Robert E. Stahlbush, Marko J. Tadjer, Karl D. Hobart, Francis J. Kub
  • Patent number: 10403509
    Abstract: A method for removing existing basal plane dislocations (BPDs) from silicon carbide epilayers by using a pulsed rapid thermal annealing process where the BPDs in the epilayers were eliminated while preserving the epitaxial surface. This high temperature, high pressure method uses silicon carbide epitaxial layers with a carbon cap to protect the surface. These capped epilayers are subjected to a plurality of rapid heating and cooling cycles.
    Type: Grant
    Filed: April 6, 2015
    Date of Patent: September 3, 2019
    Assignee: The Government of the United States of America, as represented by the Secretary of the Navy
    Inventors: Marko J. Tadjer, Boris N. Feigelson, Nadeemullah A. Mahadik, Robert E. Stahlbush, Eugene A. Imhoff, Jordan Greenlee
  • Patent number: 10020366
    Abstract: A method and device including adding a protective layer on the surface of a substrate, annealing the substrate at a temperature approximately greater or equal to 1850° C., removing the protective layer from the surface of the substrate after the annealing, and growing a first epilayer on the substrate after the removing of the protective layer, wherein the first epilayer is grown without attempting to prevent the basal plane dislocations to propagate in the first epilayer when growing the first epilayer, and wherein the first epilayer is free of the basal plane dislocations.
    Type: Grant
    Filed: September 22, 2016
    Date of Patent: July 10, 2018
    Assignee: The United States of America, as represented by the Secretary of the Navy
    Inventors: Nadeemullah A. Mahadik, Robert E. Stahlbush, Eugene A. Imhoff, Marko J. Tadjer
  • Publication number: 20180040472
    Abstract: Described herein is a method for growing indium nitride (InN) materials by growing hexagonal and/or cubic InN using a pulsed growth method at a temperature lower than 300° C. Also described is a material comprising InN in a face-centered cubic lattice crystalline structure having an NaCl type phase.
    Type: Application
    Filed: September 7, 2017
    Publication date: February 8, 2018
    Inventors: Neeraj Nepal, Charles R. Eddy, JR., Nadeemullah A. Mahadik, Syed B. Qadri, Michael J. Mehl
  • Publication number: 20170092724
    Abstract: A method and device including adding a protective layer on the surface of a substrate, annealing the substrate at a temperature approximately greater or equal to 1850° C., removing the protective layer from the surface of the substrate after the annealing, and growing a first epilayer on the substrate after the removing of the protective layer, wherein the first epilayer is grown without attempting to prevent the basal plane dislocations to propagate in the first epilayer when growing the first epilayer, and wherein the first epilayer is free of the basal plane dislocations.
    Type: Application
    Filed: September 22, 2016
    Publication date: March 30, 2017
    Inventors: Nadeemullah A. Mahadik, Robert E. Stahlbush, Eugene A. Imhoff, Marko J. Tadjer
  • Publication number: 20150287613
    Abstract: A method for removing existing basal plane dislocations (BPDs) from silicon carbide epilayers by using a pulsed rapid thermal annealing process where the BPDs in the epilayers were eliminated while preserving the epitaxial surface. This high temperature, high pressure method uses silicon carbide epitaxial layers with a carbon cap to protect the surface. These capped epilayers are subjected to a plurality of rapid heating and cooling cycles.
    Type: Application
    Filed: April 6, 2015
    Publication date: October 8, 2015
    Inventors: Marko J. Tadjer, Boris N. Feigelson, Nadeemullah A. Mahadik, Robert E. Stahlbush, Eugene A. Imhoff, Jordan Greenlee
  • Patent number: 9129799
    Abstract: A method to remove basal plane dislocations in post growth silicon carbide epitaxial layers by capping post growth silicon carbide epilayers with a graphite cap and annealing the capped silicon carbon epilayers at a temperature of 1750° C. or greater with a nitrogen overpressure of 60-110 psi, wherein basal plane dislocations in the epilayers are removed while surface morphology is preserved. Also disclosed is the related silicon carbide substrate material made by this method.
    Type: Grant
    Filed: September 26, 2014
    Date of Patent: September 8, 2015
    Assignee: The United States of America, as represented by the Secretary of the Navy
    Inventors: Nadeemullah A. Mahadik, Robert E. Stahlbush, Marko J. Tadjer, Eugene A. Imhoff, Boris N. Feigelson
  • Publication number: 20150155166
    Abstract: A method to remove basal plane dislocations in post growth silicon carbide epitaxial layers by capping post growth silicon carbide epilayers with a graphite cap and annealing the capped silicon carbon epilayers at a temperature of 1750° C. or greater with a nitrogen overpressure of 60-110 psi, wherein basal plane dislocations in the epilayers are removed while surface morphology is preserved. Also disclosed is the related silicon carbide substrate material made by this method.
    Type: Application
    Filed: September 26, 2014
    Publication date: June 4, 2015
    Inventors: Nadeemullah A. Mahadik, Robert E. Stahlbush, Marko J. Tadjer, Eugene A. Imhoff, Boris N. Feigelson