Patents by Inventor Naga Gollakota

Naga Gollakota has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5968194
    Abstract: A method and apparatus for using weighted random patterns in a partial scan test. A computer generates deterministic patterns on the partial scan design. Deterministic patterns that have the same number of capture clocks between adjacent scan loads are grouped together into pattern groups. A computer then determines a set of weights corresponding to each of the pattern groups. A tester then uses these weights as a filter to weighted random test patterns and applies these filtered weighted random test patterns along with the appropriate number of capture clock pulses to a device under test.
    Type: Grant
    Filed: March 31, 1997
    Date of Patent: October 19, 1999
    Assignee: Intel Corporation
    Inventors: David Wu, Praveen Parvathala, Naga Gollakota