Patents by Inventor Nagahisa Watanabe

Nagahisa Watanabe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7740486
    Abstract: An electronic device, comprising an improved printed circuit board connection for connecting a first printed circuit board to a second printed circuit board in a manner that permits physical engagement at a different position than the electrical engagement, and a method for making the improved printed circuit board connection with precision in alignment. In one embodiment, the first printed circuit board includes an end portion configured to engage with a member of a connector on the second printed circuit board. The end portion and the member engage along concave portions of the end portion and convex portions of the member. When engaged, the end portion and the member align wires of the first printed circuit board with terminals of the connector.
    Type: Grant
    Filed: May 14, 2008
    Date of Patent: June 22, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Nagahisa Watanabe
  • Publication number: 20080227313
    Abstract: An electronic device, comprising an improved printed circuit board connection for connecting a first printed circuit board to a second printed circuit board in a manner that permits physical engagement at a different position than the electrical engagement, and a method for making the improved printed circuit board connection with precision in alignment. In one embodiment, the first printed circuit board includes an end portion configured to engage with a member of a connector on the second printed circuit board. The end portion and the member engage along concave portions of the end portion and convex portions of the member. When engaged, the end portion and the member align wires of the first printed circuit board with terminals of the connector.
    Type: Application
    Filed: May 14, 2008
    Publication date: September 18, 2008
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Nagahisa Watanabe
  • Patent number: 7387515
    Abstract: An improved printed circuit board connection for connecting a first printed circuit board to a second printed circuit board in a manner that permits physical engagement at a different position than the electrical engagement, and a method for making the improved printed circuit board connection with precision in alignment. In one embodiment, the first printed circuit board includes an end portion configured to engage with a member of a connector on the second printed circuit board. The end portion and the member engage along concave portions of the end portion and convex portions of the member. When engaged, the end portion and the member align wires of the first printed circuit board with terminals of the connector.
    Type: Grant
    Filed: May 11, 2006
    Date of Patent: June 17, 2008
    Assignee: Kabushi Kaisha Toshiba
    Inventor: Nagahisa Watanabe
  • Publication number: 20060258179
    Abstract: According to one embodiment, there is provided a printed circuit board. The printed circuit board includes an end portion to be engaged with a member of a connector having a plurality of terminals when the printed circuit board is connected to the connector, and a plurality of wires to be electrically connected to the plurality of terminals of the connector at positions different from the end portion when the end portion is engaged with the member. The end portion includes a plurality of semicircular concave portions. The semicircular concave portions are engaged with the member to align the plurality of terminals with the plurality of wires when the end portion is engaged with the member.
    Type: Application
    Filed: May 11, 2006
    Publication date: November 16, 2006
    Inventor: Nagahisa Watanabe
  • Patent number: 6740822
    Abstract: A printed circuit board includes a substrate having a mounting surface on which a surface mount device having at least one terminal is to be mounted. On the mounting surface, at least one footprint is arranged and positioned to align with the terminal. The footprint comprises a plurality of patterned parts and a plurality of solder layers formed on the patterned parts, respectively. Each patterned part is so shaped to limit a region in which molten solder flows when the solder layer is melted.
    Type: Grant
    Filed: March 21, 2002
    Date of Patent: May 25, 2004
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Nagahisa Watanabe
  • Patent number: 6717070
    Abstract: A printed wiring board comprises an insulating layer having first and second surfaces and the wiring layers. The insulating layer has a via electrically connected between the wiring layers. The via has one end opened on the first surface and the other end closed by the wiring layer on the second surface. The inner surface of the via is covered with a first plating layer. The first plating layer continuously covers the wiring layer exposed within the via and that portion of the wiring layer which is formed on the first surface and which faces one end of the via. A second plating layer is laminated on the first plating layer. The second plating layer electrically connects the wiring layers by cooperating with the first plating layer.
    Type: Grant
    Filed: July 6, 2001
    Date of Patent: April 6, 2004
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Nagahisa Watanabe
  • Publication number: 20020134577
    Abstract: A printed circuit board includes a substrate having a mounting surface on which a surface mount device having at least one terminal is to be mounted. On the mounting surface, at least one footprint is arranged and positioned to align with the terminal. The footprint comprises a plurality of patterned parts and a plurality of solder layers formed on the patterned parts, respectively. Each patterned part is so shaped to limit a region in which molten solder flows when the solder layer is melted.
    Type: Application
    Filed: March 21, 2002
    Publication date: September 26, 2002
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Nagahisa Watanabe
  • Publication number: 20020023778
    Abstract: A printed wiring board comprises an insulating layer having first and second surfaces and the wiring layers. The insulating layer has a via electrically connected between the wiring layers. The via has one end opened on the first surface and the other end closed by the wiring layer on the second surface. The inner surface of the via is covered with a first plating layer. The first plating layer continuously covers the wiring layer exposed within the via and that portion of the wiring layer which is formed on the first surface and which faces one end of the via. A second plating layer is laminated on the first plating layer. The second plating layer electrically connects the wiring layers by cooperating with the first plating layer.
    Type: Application
    Filed: July 6, 2001
    Publication date: February 28, 2002
    Inventor: Nagahisa Watanabe