Abstract: An apparatus (200) for diagnosing asthma is disclosed. The apparatus (200) comprises a data acquisition module (210) configured to acquire at least one physical deformation feature associated with at least one of nasal flaring, neck retraction and inter-coastal retraction of a subject under examination and an analysis module (220) configured to analyze the acquired at least one physical deformation feature associated with at least one of the nasal flaring, the neck retraction and the inter-coastal retraction of the subject under examination and diagnose the asthma based on the analyzed at least one physical deformation feature associated with at least one of the nasal flaring, the neck retraction and the inter-coastal retraction of the subject under examination. The disclosed apparatus (200) can be used for monitoring asthma at home, at hospital or in ambulatory patients.

Abstract: A memory region protection unit is disclosed that comprises a first register for storing a memory region address, a second register for storing the memory region size, an arithmetic function block for executing an arithmetic function on a memory address provided to the region protection unit and the address value in the first register. The unit further has a comparator for comparing the output of the arithmetic function block with the size value in the second register, the comparator being coupled to an output for signalling the validity of the memory address on the bus The region protection unit has a controller configured to retrieve the memory region address and the memory region size from instructions issued to the region protection unit for associating the unit with said region, and to dissociate the unit from its memory region in response to a further instruction.

Abstract: This method for analysing the sounds of body fluid flows comprises:—simultaneously acquiring (2) sounds from various locations of a body;—identifying (6) the points of maximum sound intensity (PMIs) of the acquired sounds for each acquisition instant;—determining (10) the source locations of the acquired sounds; and—determining (12, 14) the sound radiation patterns of the acquired sounds. The invention also relates to the corresponding device, system and program.

Abstract: A memory region protection unit is disclosed that comprises a first register for storing a memory region address, a second register for storing the memory region size, an arithmetic function block for executing an arithmetic function on a memory address provided to the region protection unit and the address value in the first register. The unit further has a comparator for comparing the output of the arithmetic function block with the size value in the second register, the comparator being coupled to an output for signalling the validity of the memory address on the bus The region protection unit has a controller configured to retrieve the memory region address and the memory region size from instructions issued to the region protection unit for associating the unit with said region, and to dissociate the unit from its memory region in response to a further instruction.

Abstract: A data processing system is provided comprising at least one processing unit (PU) for data processing and a debugger means (DM) for debugging the processing of the at least one processing unit (PU) based on a plurality of breakpoints. The debugger means (DM) comprises a first register (BAR) for storing a base address for one of the plurality of breakpoints, wherein the debugging means (DM) initiates the debugging of the processing of the at least one processing units (PU) based on the base address stored in the first breakpoint register, i.e. the base address register. A second breakpoint register (OR) is provided for storing an offset for obtaining subsequent breakpoints. A logic arithmetic unit (LAU) is provided for repetitively calculating a breakpoint condition based on the base address stored in the first breakpoint register and the offset stored in the second breakpoint register and for updating the base address stored in the first breakpoint register.

Abstract: A data processing system in a multi-tasking environment is provided. The data processing system comprises at least one processing unit (1) for an interleaved processing of the multiple tasks. Each of the multiple tasks comprises available data associated to it and a corresponding waiting time. In addition, a task scheduler (2) is provided for scheduling the multiple tasks to be processed by the at least one processing unit (1). The task scheduling is performed based on the amount of data available for the one of the multiple tasks and based on the waiting time of the data to get processed by that task.

Abstract: A data processing system is provided with at least one processing unit (1) for an interleaved processing of multiple tasks (T1-T3), and a cache (5) associated to the at least one processing unit (1) for caching data for the multiple tasks (T1-T3) to be processed by the at least one processing unit (1). The cache (5) is divided into a plurality of cache lines (6). Each of the cache lines (6) is associated to one of the multiple tasks (T1-T3). Furthermore, a task scheduler (10) is provided for scheduling the multiple tasks (T1-T3) to be processed in an interleaved manner by the at least one processing unit (1). A cache controller (20) is provided for selecting those cache lines (6) in the cache (5), which are to be evicted from the cache (5). This selection is performed based on the task scheduling of the task scheduler (10).

Abstract: A data processing system is provided. The data processing system comprises at least one processor (P) for processing data according to a set of instructions. The processors are coupled by a bus means (BM). Furthermore, a debugging means (DM) is provided to detect the occurrence of events and the corresponding point of time of the occurrence on the bus means (BM). If predefined events occur at, within and/or after/before predefined points in time, the debugging mode is switched on.

Abstract: A data processing system is provided comprising at least one processing unit (PU) for data processing and a debugger means (DM) for debugging the processing of the at least one processing unit (PU) based on a plurality of breakpoints. The debugger means (DM) comprises a first register (BAR) for storing a base address for one of the plurality of breakpoints, wherein the debugging means (DM) initiates the debugging of the processing of the at least one processing units (PU) based on the base address stored in the first breakpoint register, i.e. the base address register. A second breakpoint register (OR) is provided for storing an offset for obtaining subsequent breakpoints. A logic arithmetic unit (LAU) is provided for repetitively calculating a breakpoint condition based on the base address stored in the first breakpoint register and the offset stored in the second breakpoint register and for updating the base address stored in the first breakpoint register.

Abstract: A multiprocessor system-on-chip 102 with dynamic adaptive power management for execution of data-dependent applications comprises strategically placed performance counters to collect run-time performance requirements of tasks. A power manager 130 issues DVS 132, DFS 134, time-out 136, and other controls to the various system resources being monitored. As the tasks execute during run-time, the quality of the match between the task and the resource it was scheduled to is analyzed. More accurate power controls and schedules are then made available and stored in a performance requirements table. The power-management is therefore adaptive and dynamic. During a static analysis phase, applications and tasks that can be pre-characterized for their performance requirements are profiled and pre-loaded as initial starting points for correction during run-time.

Abstract: The communication apparatus (1) is capable of scheduling transmission of a message at a specified time to a specified communication address. The message, the time, and the communication address can be entered well before the specified time. The message is stored in a first storage means (7). The time and the communication address are stored in a second storage means (19). At the specified time, a timing device (13) triggers an auto-dialer (11) contained in a control unit (9) to initiate transmission of the message to the specified communication address, using a transmitter (3). The communication software enables a programmable apparatus, when executing said software, to function as a communication apparatus for scheduling transmission of a message to a specified communication address at a specified time.