Abstract: A system for optical communication forms a family of orthogonal optical codes modulated by a data stream. The orthogonal codes are formed by creating a stream of evenly spaced-apart pulses using a pulse spreader circuit and modulating the pulses in amplitude and/or phase to form a family of orthogonal optical code words, each representing a symbol. A spreader calibration circuit is used to ensure accurate timing and modulation. Each code word is further modulated by a predetermined number of data bits. The data modulation scheme splits a code word into H and V components, and further processes the components prior to modulation with data, followed by recombining with a polarization beam combiner. The data-modulated code word is then sent, along with others to receiver. The received signal is detected and demodulated with the help of a symbol synchronization unit which establishes the beginning and end of the code words.

Abstract: A system for optical communication send optical signals over a plurality of wavelength channels. Each wavelength channel comprises a number of orthogonal subchannel frequencies which are spaced apart from one another by a predetermined amount. Each of the subchannel frequencies is modulated with data from a data stream. The data modulation scheme splits a subchannel frequency code into H and V components, and further processes the components prior to modulation with data. The various data-modulated subchannels are then combined into a single channel for transmission. The received signals are detected and demodulated with the help of a symbol timing recovery module which establishes the beginning and end of each symbol. A polarization mode distortion compensation module at the receiver is used to mitigate the effects to polarization more distortion in the fiber.

Abstract: Techniques are provided for the implementation of dynamically biased circuits. In these circuits, bias currents are varied according to signal amplitude. Benefits include reduced power dissipation, reduced noise, and increased dynamic range. The techniques can be employed in various types of circuits such as, for example, amplifiers, log-domain circuits, and filters.

Abstract: Techniques are provided for the implementation of dynamically biased circuits. In these circuits, bias currents are varied according to signal amplitude. Benefits include reduced power dissipation, reduced noise, and increased dynamic range. The techniques can be employed in various types of circuits such as, for example, amplifiers, log-domain circuits, and filters.

Abstract: Techniques are provided for the implementation of dynamically biased circuits. In these circuits, bias currents are varied according to signal amplitude. Benefits include reduced power dissipation, reduced noise, and increased dynamic range. The techniques can be employed in various types of circuits such as, for example, amplifiers, log-domain circuits, and filters.

Abstract: Techniques are provided for the implementation of dynamically biased circuits. In these circuits, bias currents are varied according to signal amplitude. Benefits include reduced power dissipation, reduced noise, and increased dynamic range. The techniques can be employed in various types of circuits such as, for example, amplifiers, log-domain circuits, and filters.

Abstract: A system for generating a glitch-free output signal having a frequency. The system comprises a frequency divider for receiving a signal having an input frequency, wherein the frequency divider is configured to generate a plurality of corresponding phase-shifted signals. A retimer is coupled to the frequency divider and is configured to receive the phase-shifted signals and to generate multiplexer input signals for receipt by a multiplexer. The retimer is further configured to receive retimer control signals and to generate corresponding multiplexer control signals. The multiplexer is coupled to the retimer and has input terminals configured to receive the multiplexer input signals. The multiplexer is controlled by the multiplexer control signals so as to alternately and successively provide at its output terminal one of the multiplexer input signals.

Abstract: Techniques are provided for the implementation of dynamically biased circuits. In these circuits, bias currents are varied according to signal amplitude. Benefits include reduced power dissipation, reduced noise, and increased dynamic range. The techniques can be employed in various types of circuits such as, for example, amplifiers, log-domain circuits, and filters.

Abstract: Techniques are provided for the implementation of dynamically biased circuits. In these circuits, bias currents are varied according to signal amplitude. Benefits include reduced power dissipation, reduced noise, and increased dynamic range. The techniques can be employed in various types of circuits such as, for example, amplifiers, log-domain circuits, and filters.

Abstract: Techniques are provided for the implementation of dynamically biased circuits. In these circuits, bias currents are varied according to signal amplitude. Benefits include reduced power dissipation, reduced noise, and increased dynamic range. The techniques can be employed in various types of circuits such as, for example, amplifiers, log-domain circuits, and filters.

Abstract: A system for optical communication send optical signals over a plurality of wavelength channels. Each wavelength channel comprises a number of orthogonal subchannel frequencies which are spaced apart from one another by a predetermined amount. Each of the subchannel frequencies is modulated with data from a data stream. The data modulation scheme splits a subchannel frequency code into H and V components, and further processes the components prior to modulation with data. The various data-modulated subchannels are then combined into a single channel for transmission. The received signals are detected and demodulated with the help of a symbol timing recovery module which establishes the beginning and end of each symbol. A polarization mode distortion compensation module at the receiver is used to mitigate the effects to polarization more distortion in the fiber.

Abstract: A system for optical communication forms a family of orthogonal optical codes modulated by a data stream. The orthogonal codes are formed by creating a stream of evenly spaced-apart pulses using a pulse spreader circuit and modulating the pulses in amplitude and/or phase to form a family of orthogonal optical code words, each representing a symbol. A spreader calibration circuit is used to ensure accurate timing and modulation. Each code word is further modulated by a predetermined number of data bits. The data modulation scheme splits a code word into H and V components, and further processes the components prior to modulation with data, followed by recombining with a polarization beam combiner. The data-modulated code word is then sent, along with others to receiver. The received signal is detected and demodulated with the help of a symbol synchronization unit which establishes the beginning and end of the code words.

Abstract: Techniques are provided for the implementation of dynamically biased circuits. In these circuits, bias currents are varied according to signal amplitude. Benefits include reduced power dissipation, reduced noise, and increased dynamic range. The techniques can be employed in various types of circuits such as, for example, amplifiers, log-domain circuits, and filters.

Abstract: We have recognized that the design and programming complexity associated with conventional frequency divider configurations can be significantly reduced by a configuration of functionally identical, modular division blocks which are each able to swallow at least one input cycle of a input signal by switching to a phase-lagging output once per output cycle. The number of input pulses swallowed when a division block switches to a lagging waveform is a direct function of the division block's location in the chain, such that the number of input cycles swallowed per phase switch increases moving down the chain of division blocks. Therefore, the chain of division blocks has discrete elements for achieving most-significant to least-significant division factor increments. The total number of input cycles swallowed by the chain of division blocks equals the sum of cycles swallowed by each division block.