Patents by Inventor Naim Siemsen-Schumann

Naim Siemsen-Schumann has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11841396
    Abstract: A storage device controller includes drive controller circuitry configured to control writing and fetching of data from a storage medium, read data channel circuitry for interfacing between the drive controller circuitry and the storage medium, test controller circuitry configured to test the read data channel circuitry by issuing test commands simulating the writing and fetching of data from the storage medium, and selector circuitry configured to switchably couple the read data channel circuitry to the drive controller circuitry in an operating mode and to the test controller circuitry in a testing mode. The storage device controller may include a pattern generator configured to output the test commands. Processor circuitry may be configured to store test results in memory, to compute performance metrics from the stored test results, and communicate the performance metrics to a host device.
    Type: Grant
    Filed: March 21, 2022
    Date of Patent: December 12, 2023
    Assignee: Marvell Asia Pte Ltd
    Inventors: Sameer Vaidya, Supaket Katchmart, Vivek Khanzode, Pallavi Joshi, Henri Sutioso, Naim Siemsen-Schumann, Hongying Sheng
  • Patent number: 9054740
    Abstract: A method includes receiving a codeword over a communications channel and initializing a test codeword to be equal to the codeword received over the communications channel. The method includes performing, for each row of a low-density parity check (LDPC) matrix, an LDPC processing operation on the test codeword. The method includes, once the LDPC processing operations have been performed for all of the rows of the LDPC matrix, repeating the LDPC processing operations. The method includes monitoring progress of the LDPC processing operations. The method includes selectively generating a termination signal in response to the test codeword being a valid codeword according to the LDPC matrix. The method includes terminating the LDPC processing operations in response to generation of the termination signal.
    Type: Grant
    Filed: February 24, 2014
    Date of Patent: June 9, 2015
    Assignee: Marvell International Ltd.
    Inventors: Shu Li, Panu Chaichanavong, Naim Siemsen-Schumann
  • Patent number: 8996952
    Abstract: The present disclosure includes systems and techniques relating to decoding signals produced within a storage device. A described technique includes retrieving a first codeword from a storage medium, decoding the first codeword, performing a retry process when the decoding was not successful, and retrieving one or more second codewords from the storage medium during the retry process to at least maintain a drive throughput. The retry process can include identifying one or more data chunks within the first codeword having potential defects, generating an erasure mask based on the one or more data chunks, applying, based on a window, one or more erasures within one or more different regions of the first codeword based on one or more corresponding regions of the erasure mask to produce one or more versions of the first codeword, and decoding the one or more versions of the first codeword.
    Type: Grant
    Filed: December 20, 2012
    Date of Patent: March 31, 2015
    Assignee: Marvell World Trade Ltd.
    Inventors: Shu Li, Yifei Zhang, Panu Chaichanavong, Naim Siemsen-Schumann
  • Patent number: 8661326
    Abstract: A decoding system including a low density parity check (LDPC) processing module and a termination module. The LDPC processing module is configured to receive a test codeword based on a codeword received over a communications channel, and perform, for each row of a parity check matrix, a processing operation on the test codeword. The LDPC processing module is configured to, once the processing operations have been performed for all the rows, repeat the processing operations. The termination module is configured to monitor progress of the LDPC processing module and selectively generate a termination signal in response to the test codeword being a valid codeword according to the parity check matrix. The LDPC processing module is further configured to terminate the processing operations in response to generation of the termination signal.
    Type: Grant
    Filed: August 3, 2011
    Date of Patent: February 25, 2014
    Assignee: Marvell International Ltd.
    Inventors: Shu Li, Panu Chaichanavong, Naim Siemsen-Schumann
  • Patent number: 8516347
    Abstract: Systems and methods are provided for decoding a vector from a communications channel using a non-binary decoder. The communications channel may correspond to a wired or wireless channel. A message passing process computes R messages corresponding to a variable node of the non-binary decoder. Decoder extrinsic information is formed for the variable node by combining the R messages. The decoder extrinsic information is provided to a soft-detector.
    Type: Grant
    Filed: May 23, 2011
    Date of Patent: August 20, 2013
    Assignee: Marvell International Ltd.
    Inventors: Shu Li, Panu Chaichanavong, Jun Gao, Naim Siemsen-Schumann