Abstract: A spectral feature of a pulsed light beam produced by an optical source is estimated by modifying the wavelength of the pulsed light beam based on a predefined repeating pattern having a pattern period including a plurality of steps, the modification including shifting the wavelength of the pulsed light beam by a wavelength offset from a baseline wavelength for each step in the pattern period; measuring the wavelength of the light beam for each step in the pattern period as the wavelength is modified across the pattern; and estimating a spectral feature of the pulsed light beam over an evaluation window that includes all of the steps within the pattern period based at least in part on the measured wavelength of the light beam for each step in the pattern period.

Abstract: A spectral feature of a pulsed light beam produced by an optical source is estimated by modifying the wavelength of the pulsed light beam based on a predefined repeating pattern having a pattern period including a plurality of steps, the modification including shifting the wavelength of the pulsed light beam by a wavelength offset from a baseline wavelength for each step in the pattern period; measuring the wavelength of the light beam for each step in the pattern period as the wavelength is modified across the pattern; and estimating a spectral feature of the pulsed light beam over an evaluation window that includes all of the steps within the pattern period based at least in part on the measured wavelength of the light beam for each step in the pattern period.

Abstract: A method of controlling a spectral property of a light beam includes directing a light beam to a lithography exposure apparatus configured to create a pattern on a wafer; receiving information representative of a spectral property of the light beam; receiving information representative of an optical imaging condition of the lithography exposure apparatus; estimating a characteristic value of the light beam based on the received spectral property information and the received optical imaging condition information; determining whether the estimated light beam characteristic value matches a target light beam characteristic value; and if it is determined that the estimated light beam characteristic value does not match the target light beam characteristic value, adjusting the spectral property of the light beam.

Abstract: A design system for designing complex integrated circuits (ICs), a method of IC design and program product therefor. A layout unit receives a circuit description representing portions in a grid and glyph format. A checking unit checks grid and glyph portions of the design. An elaboration unit generates a target layout from the checked design. A data prep unit prepares the target layout for mask making. A pattern caching unit selectively replaces portions of the design with previously cached results for improved design efficiency.

Abstract: A method for determining an image of a patterned object formed by a polychromatic lithographic projection system having a laser radiation source of a finite spectral bandwidth and a lens for imaging the patterned object to an image plane within a resist layer. The method comprises providing patterns for the object, a spectrum of the radiation source to be used in the lithographic projection system, an intensity and polarization distribution of the radiation source, and a lens impulse response in the spatial domain or in the spatial frequency domain of the image. The method then includes forming a polychromatic 4D bilinear vector kernel comprising a partially coherent polychromatic joint response between pairs of points in the spatial domain or in the spatial frequency domain, determining the dominant polychromatic 2D kernels of the polychromatic 4D bilinear vector kernel, and determining the image of the patterned object from convolutions of the object patterns with the dominant polychromatic 2D kernels.

Abstract: A design system for designing complex integrated circuits (ICs), a method of IC design and program product therefor. A layout unit receives a circuit description representing portions in a grid and glyph format. A checking unit checks grid and glyph portions of the design. An elaboration unit generates a target layout from the checked design. A data prep unit prepares the target layout for mask making. A pattern caching unit selectively replaces portions of the design with previously cached results for improved design efficiency.

Abstract: A design system for designing complex integrated circuits (ICs), a method of IC design and program product therefor. A layout unit receives a circuit description representing portions in a grid and glyph format. A checking unit checks grid and glyph portions of the design. An elaboration unit generates a target layout from the checked design. A data prep unit prepares the target layout for mask making. A pattern caching unit selectively replaces portions of the design with previously cached results for improved design efficiency.

Abstract: A method of controlling a spectral property of a light beam includes directing a light beam to a lithography exposure apparatus configured to create a pattern on a wafer; receiving information representative of a spectral property of the light beam; receiving information representative of an optical imaging condition of the lithography exposure apparatus; estimating a characteristic value of the light beam based on the received spectral property information and the received optical imaging condition information; determining whether the estimated light beam characteristic value matches a target light beam characteristic value; and if it is determined that the estimated light beam characteristic value does not match the target light beam characteristic value, adjusting the spectral property of the light beam.

Abstract: The present invention relates to a semiconductor device structure that includes at least one SRAM cell formed in a substrate. Such SRAM cell comprises two pull-up transistors, two pull-down transistors, and two pass-gate transistors. The pull-down transistors and the pass-gate transistors are substantially similar in channel widths and have substantially similar source-drain doping concentrations, while the SRAM cell has a beta ratio of at least 1.5. The substrate preferably comprises a hybrid substrate with at two isolated sets of regions, while carrier mobility in these two sets of regions differentiates by a factor of at least about 1.5. More preferably, the pull-down transistors of the SRAM cell are formed in one set of regions, and the pass-gate transistors are formed in the other set of regions, so that current flow in the pull-down transistors is larger than that in the pass-gate transistors.

Abstract: A design system for designing complex integrated circuits (ICs), a method of IC design and program product therefor. A layout unit receives a circuit description representing portions in a grid and glyph format. A checking unit checks grid and glyph portions of the design. An elaboration unit generates a target layout from the checked design. A data prep unit prepares the target layout for mask making. A pattern caching unit selectively replaces portions of the design with previously cached results for improved design efficiency.

Abstract: A design system for designing complex integrated circuits (ICs), a method of IC design and program product therefor. A layout unit receives a circuit description representing portions in a grid and glyph format. A checking unit checks grid and glyph portions of the design. An elaboration unit generates a target layout from the checked design. A data prep unit prepares the target layout for mask making. A pattern caching unit selectively replaces portions of the design with previously cached results for improved design efficiency.

Abstract: A method for fabricating a mask used to make integrated circuits is provided using an improved OPC process whereby a pre-fracturing OPC process is performed on the target design of the integrated circuit. The pre-fractured OPC design is then fractured and a post-fracturing OPC process performed to make the final mask. Either rule-based OPC or model-based OPC processes can be used for both of the OPC steps or each step can be either side-based or model-based OPC.

Abstract: A method for fabricating a mask used to make integrated circuits is provided using an improved OPC process whereby a pre-fracturing OPC process is performed on the target design of the integrated circuit. The pre-fractured OPC design is then fractured and a post-fracturing OPC process performed to make the final mask. Either rule-based OPC or model-based OPC processes can be used for both of the OPC steps or each step can be either side-based or model-based OPC.

Abstract: A method for determining an image of a patterned object formed by a polychromatic lithographic projection system having a laser radiation source of a finite spectral bandwidth and a lens for imaging the patterned object to an image plane within a resist layer. The method comprises providing patterns for the object, a spectrum of the radiation source to be used in the lithographic projection system, an intensity and polarization distribution of the radiation source, and a lens impulse response in the spatial domain or in the spatial frequency domain of the image. The method then includes forming a polychromatic 4D bilinear vector kernel comprising a partially coherent polychromatic joint response between pairs of points in the spatial domain or in the spatial frequency domain, determining the dominant polychromatic 2D kernels of the polychromatic 4D bilinear vector kernel, and determining the image of the patterned object from convolutions of the object patterns with the dominant polychromatic 2D kernels.

Abstract: A method and system for layout optimization relative to lithographic process windows which facilitates lithographic constraints to be non-localized in order to impart a capability of printing a given circuit with a process window beyond the process windows which are attainable with conventional simplified design rules. Pursuant to the method and system, lithographic capability and process windows are maximized to satisfy local circuit requirements and in order to achieve a maximally efficient layout.

Abstract: The present invention relates to a semiconductor device structure that includes at least one SRAM cell formed in a substrate. Such SRAM cell comprises two pull-up transistors, two pull-down transistors, and two pass-gate transistors. The pull-down transistors and the pass-gate transistors are substantially similar in channel widths and have substantially similar source-drain doping concentrations, while the SRAM cell has a beta ratio of at least 1.5. The substrate preferably comprises a hybrid substrate with at two isolated sets of regions, while carrier mobility in these two sets of regions differentiates by a factor of at least about 1.5. More preferably, the pull-down transistors of the SRAM cell are formed in one set of regions, and the pass-gate transistors are formed in the other set of regions, so that current flow in the pull-down transistors is larger than that in the pass-gate transistors.

Abstract: A method and system is provided for computing lithographic images that may take into account non-scalar effects such as lens birefringence, resist stack effects, tailored source polarizations, and blur effects of the mask and the resist. A generalized bilinear kernel is formed, which is independent of the mask transmission function, and which may then be treated using a decomposition to allow rapid computation of an image that includes such non-scalar effects. Weighted pre-images may be formed from a coherent sum of pre-computed convolutions of the dominant eigenfunctions of the generalized bilinear kernel with the appropriate mask polygon sectors. The image at a point may be formed from the incoherent sum of the weighted pre-images over all of the dominant eigenfunctions of the generalized bilinear kernel. The resulting image can then be used to perform model-based optical proximity correction (MBOPC).

Abstract: A design system for designing complex integrated circuits (ICs), a method of IC design and program product therefor. A layout unit receives a circuit description representing portions in a grid and glyph format. A checking unit checks grid and glyph portions of the design. An elaboration unit generates a target layout from the checked design. A data prep unit prepares the target layout for mask making. A pattern caching unit selectively replaces portions of the design with previously cached results for improved design efficiency.

Abstract: The present invention provides a lithographic method and apparatus (e.g., for printing contact holes on a wafer) that use a single mask, multiple exposures, and optimized pupil filtering. The method comprises: providing a mask including pattern features to be transferred to a wafer; transferring a first set of pattern features from the mask to the wafer using a first type of illumination and a first type of pupil filter; and transferring a second set of pattern features from the mask to the wafer using a second type of illumination and a second type of pupil filter.

Abstract: An efficient method and system is provided for computing lithographic images that takes into account vector effects such as lens birefringence, resist stack effects and tailored source polarizations, and may also include blur effects of the mask and the resist. These effects are included by forming a generalized bilinear kernel, which is independent of the mask transmission function, which can then be treated using a decomposition to allow rapid computation of an image that includes such non-scalar effects. Dominant eigenfunctions of the generalized bilinear kernel can be used to pre-compute convolutions with possible polygon sectors. A mask transmission function can then be decomposed into polygon sectors, and weighted pre-images may be formed from a coherent sum of the pre-computed convolutions for the appropriate mask polygon sectors. The image at a point may be formed from the incoherent sum of the weighted pre-images over all of the dominant eigenfunctions of the generalized bilinear kernel.