Abstract: A semiconductor device and a method of fabricating a semiconductor device, the device including a fin-type pattern extending in a first direction; a gate electrode extending in a second direction over the fin-type pattern, the second direction being different from the first direction; spacers on sidewalls of the gate electrode; a capping structure on the gate electrode and the spacers, the capping structure including a first capping pattern and a second capping pattern, the second capping pattern being on the first capping pattern; and an interlayer insulating film surrounding sidewalls of each of the spacers and sidewalls of the capping structure, the interlayer insulating film being in contact with the first capping pattern.

Abstract: A semiconductor device and a method of fabricating a semiconductor device, the device including a fin-type pattern extending in a first direction; a gate electrode extending in a second direction over the fin-type pattern, the second direction being different from the first direction; spacers on sidewalls of the gate electrode; a capping structure on the gate electrode and the spacers, the capping structure including a first capping pattern and a second capping pattern, the second capping pattern being on the first capping pattern; and an interlayer insulating film surrounding sidewalls of each of the spacers and sidewalls of the capping structure, the interlayer insulating film being in contact with the first capping pattern.

Abstract: A semiconductor device includes an active pattern; gate spacers on the active pattern defining a gate trench; a gate insulating layer along a sidewall and a bottom surface of the gate trench; a first conductive layer on the gate insulating layer; a second conductive layer on the first conductive layer in the gate trench; a third conductive layer on the second conductive layer in the gate trench and including a first portion between parts of the second conductive layer, and a second portion on the first portion and in contact with an upper surface of the second conductive layer; and a capping pattern on the second and third conductive layers and including a portion between the gate insulating layer and the second portion, and in contact with a sidewall of the second portion, wherein a width of the second portion is greater than a width of the first portion.

Abstract: A semiconductor device includes a first interlayer insulating film; a conductive connection structure provided in the first interlayer insulating film; a second interlayer insulating film provided on the first interlayer insulating film; a wiring structure provided in the second interlayer insulating film and connected to the conductive connection structure; and an insertion liner interposed between an upper surface of the conductive connection structure and the wiring structure, the insertion liner including carbon.

Abstract: A semiconductor device and a method of fabricating a semiconductor device, the device including a fin-type pattern extending in a first direction; a gate electrode extending in a second direction over the fin-type pattern, the second direction being different from the first direction; spacers on sidewalls of the gate electrode; a capping structure on the gate electrode and the spacers, the capping structure including a first capping pattern and a second capping pattern, the second capping pattern being on the first capping pattern; and an interlayer insulating film surrounding sidewalls of each of the spacers and sidewalls of the capping structure, the interlayer insulating film being in contact with the first capping pattern.

Abstract: A semiconductor device includes a first interlayer insulating film; a conductive connection structure provided in the first interlayer insulating film; a second interlayer insulating film provided on the first interlayer insulating film; a wiring structure provided in the second interlayer insulating film and connected to the conductive connection structure; and an insertion liner interposed between an upper surface of the conductive connection structure and the wiring structure, the insertion liner including carbon.

Abstract: A semiconductor device and a method of fabricating a semiconductor device, the device including a fin-type pattern extending in a first direction; a gate electrode extending in a second direction over the fin-type pattern, the second direction being different from the first direction; spacers on sidewalls of the gate electrode; a capping structure on the gate electrode and the spacers, the capping structure including a first capping pattern and a second capping pattern, the second capping pattern being on the first capping pattern; and an interlayer insulating film surrounding sidewalls of each of the spacers and sidewalls of the capping structure, the interlayer insulating film being in contact with the first capping pattern.

Abstract: A semiconductor device and a method of fabricating a semiconductor device, the device including a fin-type pattern extending in a first direction; a gate electrode extending in a second direction over the fin-type pattern, the second direction being different from the first direction; spacers on sidewalls of the gate electrode; a capping structure on the gate electrode and the spacers, the capping structure including a first capping pattern and a second capping pattern, the second capping pattern being on the first capping pattern; and an interlayer insulating film surrounding sidewalls of each of the spacers and sidewalls of the capping structure, the interlayer insulating film being in contact with the first capping pattern.

Abstract: A semiconductor device includes a first interlayer insulating film; a conductive connection structure provided in the first interlayer insulating film; a second interlayer insulating film provided on the first interlayer insulating film; a wiring structure provided in the second interlayer insulating film and connected to the conductive connection structure; and an insertion liner interposed between an upper surface of the conductive connection structure and the wiring structure, the insertion liner including carbon.

Abstract: Semiconductor devices and methods for fabricating the same are provided. A semiconductor device may include a substrate including first and second regions, a first interface film disposed on the substrate in the first region, a second interface film disposed on the substrate in the second region, a dielectric film disposed on the first and second interface films, a first metal film disposed on the dielectric film in the first region, and a second metal film disposed on the dielectric film in the second region. The first and second interface films may comprise an oxide of the substrate, the first and second metal films may comprise different materials, and the first and second interface films may have different thicknesses. Channels may be provided in the first and second regions, and the channels may be fin-shaped or wire-shaped. The metal films may have different oxygen content.

Abstract: A pyridine-based compound containing an isoxazoline ring represented by Formula 1 or an agrochemically acceptable salt thereof can be used as a herbicide. A method of preparing the pyridine-based compound containing an isoxazoline ring represented by Formula 1 includes reacting a compound represented by Formula 2 with a compound represented by Formula 3.

Abstract: Semiconductor devices and methods for fabricating the same are provided. A semiconductor device may include a substrate including first and second regions, a first interface film disposed on the substrate in the first region, a second interface film disposed on the substrate in the second region, a dielectric film disposed on the first and second interface films, a first metal film disposed on the dielectric film in the first region, and a second metal film disposed on the dielectric film in the second region. The first and second interface films may comprise an oxide of the substrate, the first and second metal films may comprise different materials, and the first and second interface films may have different thicknesses. Channels may be provided in the first and second regions, and the channels may be fin-shaped or wire-shaped. The metal films may have different oxygen content.

Abstract: Provided are an ortho-substituted phenylisoxazoline-based compound with 2,6-difluorobenzyloxymethyl represented by Formula 1, or a racemate or enantiomer thereof, a herbicide including the ortho-substituted phenylisoxazoline-based compound, or the racemate or enantiomer thereof as an active ingredient, and a method of selectively controlling grass weed comprising treating with the ortho-substituted phenylisoxazoline-based compound, or the racemate or enantiomer thereof before or after the grass weed emerges.

Abstract: Provided is an industrial method for the preparation of [5-{(2,6-difluorobenzyloxy)methyl}-4,5-dihydro-5-methyl-3-(3-methylthiophene-2-yl)-isoxazole](common name: methiozolin) represented by Formula 1 that is a herbicidal substance in high-purity.

Abstract: Provided is an industrial method for the preparation of [5-{(2,6-difluorobenzyloxy)methyl}-4,5-dihydro-5-methyl-3-(3-methylthiophene-2-yl)-isoxazole](common name: methiozolin) represented by Formula 1 that is a herbicidal substance in high-purity.

Abstract: Provided are an ortho-substituted phenylisoxazoline-based compound with 2,6-difluorobenzyloxymethyl represented by Formula 1, or a racemate or enantiomer thereof, a herbicide including the ortho-substituted phenylisoxazoline-based compound, or the racemate or enantiomer thereof as an active ingredient, and a method of selectively controlling grass weed comprising treating with the ortho-substituted phenylisoxazoline-based compound, or the racemate or enantiomer thereof before or after the grass weed emerges.

Abstract: a composite dielectric thin film capable of high dielectric constant, low leakage current characteristics, and high dielectric breakdown voltage while being deposited at a room temperature, a capacitor and a field effect transistor (FET) using the same, and their fabrication methods. The composite dielectric thin film is deposited at a room temperature or less than 200° C. and comprises crystalline or amorphous insulating filler uniformly distributed within an amorphous dielectric matrix or within an amorphous and partially nanocrystalline dielectric matrix.

Abstract: a composite dielectric thin film capable of high dielectric constant, low leakage current characteristics, and high dielectric breakdown voltage while being deposited at a room temperature, a capacitor and a field effect transistor (FET) using the same, and their fabrication methods. The composite dielectric thin film is deposited at a room temperature or less than 200° C. and comprises crystalline or amorphous insulating filler uniformly distributed within an amorphous dielectric matrix or within an amorphous and partially nanocrystalline dielectric matrix.