Patents by Inventor Nam-Gyu Ryu

Nam-Gyu Ryu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120007187
    Abstract: A gate in a semiconductor device is formed to have a dummy gate pattern that protects a gate. Metal lines are formed to supply power for a semiconductor device and transfer a signal. A semiconductor device includes a quad coupled receiver type input/output buffer. The semiconductor device is formed with a gate line that extends over an active region, and a gate pad located outside of the active region. The gate line and the gate pad are adjoined such that the gate line and a side of the gate pad form a line. Dummy gates may also be applied. The semiconductor device includes a first metal line patterns supplying power to a block having a plurality of cells, a second metal line pattern transferring a signal to the cells, and dummy metal line patterns divided into in a longitudinal direction.
    Type: Application
    Filed: September 23, 2011
    Publication date: January 12, 2012
    Inventors: Nam Gyu RYU, Ho Ryong KIM, Won John CHOI, Jae Hwan KIM, Seoung Hyun KANG, Young Hee YOON
  • Patent number: 8053346
    Abstract: A gate in a semiconductor device is formed to have a dummy gate pattern that protects a gate. Metal lines are formed to supply power for a semiconductor device and transfer a signal. A semiconductor device includes a quad coupled receiver type input/output buffer. The semiconductor device is formed with a gate line that extends over an active region, and a gate pad located outside of the active region. The gate line and the gate pad are adjoined such that the gate line and a side of the gate pad form a line. Dummy gates may also be applied. The semiconductor device includes a first metal line patterns supplying power to a block having a plurality of cells, a second metal line pattern transferring a signal to the cells, and dummy metal line patterns divided into in a longitudinal direction.
    Type: Grant
    Filed: April 25, 2008
    Date of Patent: November 8, 2011
    Assignee: Hynix Semiconductor Inc.
    Inventors: Nam Gyu Ryu, Ho Ryong Kim, Won John Choi, Jae Hwan Kim, Seoung Hyun Kang, Young Hee Yoon
  • Publication number: 20110156169
    Abstract: A semiconductor apparatus comprises a semiconductor substrate; a group of PMOS transistors formed on a predetermined portion of the semiconductor substrate; a group of NMOS transistors disposed adjacent to the group of PMOS transistors on the semiconductor substrate; a guard ring region formed between the group of PMOS transistors and the group of NMOS transistors; and a current detouring unit formed in the guard ring region and configured to discharge current produced by plasma ions towards the semiconductor substrate.
    Type: Application
    Filed: July 26, 2010
    Publication date: June 30, 2011
    Applicant: Hynix Semiconductor Inc.
    Inventors: Won John CHOI, Nam Gyu Ryu
  • Publication number: 20080265335
    Abstract: A gate in a semiconductor device is formed to have a dummy gate pattern that protects a gate. Metal lines are formed to supply power for a semiconductor device and transfer a signal. A semiconductor device includes a quad coupled receiver type input/output buffer. The semiconductor device is formed with a gate line that extends over an active region, and a gate pad located outside of the active region. The gate line and the gate pad are adjoined such that the gate line and a side of the gate pad form a line. Dummy gates may also be applied. The semiconductor device includes a first metal line patterns supplying power to a block having a plurality of cells, a second metal line pattern transferring a signal to the cells, and dummy metal line patterns divided into in a longitudinal direction.
    Type: Application
    Filed: April 25, 2008
    Publication date: October 30, 2008
    Inventors: Nam Gyu RYU, Ho Ryong KIM, Won John CHOI, Jae Hwan KIM, Seoung Hyun KANG, Young Hee YOON
  • Patent number: 6703871
    Abstract: An amplifier in a semiconductor integrated circuit includes a current-mirror typed differential amplifier and a cross-coupled differential amplifier, whereby a minute voltage difference from a bit line signal or a data bus signal is amplified. The amplifier for generating an amplified signal includes a load for coupling to a first voltage potential, a first sense amplifier responsive to a first data signal, and a second sense amplifier responsive to a second data signal. The first and second sense amplifiers are commonly coupled to the load, and the amplified signal of the first or second data signal is generated.
    Type: Grant
    Filed: February 4, 2002
    Date of Patent: March 9, 2004
    Assignee: Hyundai Electronics Industries Co., Ltd.
    Inventors: Min-Young You, Nam-Gyu Ryu
  • Publication number: 20020070762
    Abstract: An amplifier in a semiconductor integrated circuit includes a current-mirror typed differential amplifier and a cross-coupled differential amplifier, whereby a minute voltage difference from a bit line signal or a data bus signal is amplified. The amplifier for generating an amplified signal includes a load for coupling to a first voltage potential, a first sense amplifier responsive to a first data signal, and a second sense amplifier responsive to a second data signal. The first and second sense amplifiers are commonly coupled to the load, and the amplified signal of the first or second data signal is generated.
    Type: Application
    Filed: February 4, 2002
    Publication date: June 13, 2002
    Applicant: Hyundai Electronics Industries Co., Ltd.
    Inventors: Min-Young You, Nam-Gyu Ryu
  • Patent number: 6359473
    Abstract: An amplifier in a semiconductor integrated circuit includes a current-mirror typed differential amplifier and a cross-coupled differential amplifier, whereby a minute voltage difference from a bit line signal or a data bus signal is amplified. The amplifier for generating an amplified signal includes a load for coupling to a first voltage potential, a first sense amplifier responsive to a first data signal, and a second sense amplifier responsive to a second data signal. The first and second sense amplifiers are commonly coupled to the load, and the amplified signal of the first or second data signal is generated.
    Type: Grant
    Filed: December 16, 1999
    Date of Patent: March 19, 2002
    Assignee: Hyundai Electronics Industries Co.
    Inventors: Min-Young You, Nam-Gyu Ryu