Patents by Inventor Nami Yasuoka

Nami Yasuoka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11616156
    Abstract: An optical semiconductor element includes an optical receiver including a first semiconductor layer, a heater for heating the first semiconductor layer; and a monitor. A first semiconductor layer that absorbs light and generates electric carriers; a heater for heating the first semiconductor layer; and a monitor including a second semiconductor layer in which dark current is changed by heat generated by the heater.
    Type: Grant
    Filed: April 21, 2020
    Date of Patent: March 28, 2023
    Assignee: FUJITSU OPTICAL COMPONENTS LIMITED
    Inventor: Nami Yasuoka
  • Publication number: 20200343398
    Abstract: An optical semiconductor element includes an optical receiver including a first semiconductor layer, a heater for heating the first semiconductor layer; and a monitor. A first semiconductor layer that absorbs light and generates electric carriers; a heater for heating the first semiconductor layer; and a monitor including a second semiconductor layer in which dark current is changed by heat generated by the heater.
    Type: Application
    Filed: April 21, 2020
    Publication date: October 29, 2020
    Applicant: FUJITSU LIMITED
    Inventor: Nami Yasuoka
  • Patent number: 9553224
    Abstract: A semiconductor photodetector element includes a semiconductor substrate having a first conductivity type; a columnar structure formed on a first surface of the semiconductor substrate, the columnar structure being composed of a semiconductor of the first conductivity type; a light absorption layer formed so as to surround the columnar structure; and a semiconductor layer formed so as to surround the light absorption layer.
    Type: Grant
    Filed: March 13, 2015
    Date of Patent: January 24, 2017
    Assignee: FUJITSU LIMITED
    Inventors: Kenichi Kawaguchi, Nami Yasuoka, Hiroyasu Yamashita, Yoshiaki Nakata
  • Patent number: 9276162
    Abstract: In order to improve reliability by preventing an edge breakdown in a semiconductor photodetector having a mesa structure such as a mesa APD, the semiconductor photodetector comprises a mesa structure formed on a first semiconductor layer of the first conduction type formed on a semiconductor substrate, the mesa structure including a light absorbing layer for absorbing light, an electric field buffer layer for dropping an electric field intensity, an avalanche multiplication layer for causing avalanche multiplication to occur, and a second semiconductor layer of the second conduction type, wherein the thickness of the avalanche multiplication layer at the portion in the vicinity of the side face of the mesa structure is made thinner than the thickness at the central portion of the mesa structure.
    Type: Grant
    Filed: May 21, 2014
    Date of Patent: March 1, 2016
    Assignees: FUJITSU LIMITED, SUMITOMO ELECTRIC DEVICE INNOVATIONS, INC.
    Inventors: Nami Yasuoka, Haruhiko Kuwatsuka, Toru Uchida, Yoshihiro Yoneda
  • Publication number: 20150187972
    Abstract: A semiconductor photodetector element includes a semiconductor substrate having a first conductivity type; a columnar structure formed on a first surface of the semiconductor substrate, the columnar structure being composed of a semiconductor of the first conductivity type; a light absorption layer formed so as to surround the columnar structure; and a semiconductor layer formed so as to surround the light absorption layer.
    Type: Application
    Filed: March 13, 2015
    Publication date: July 2, 2015
    Inventors: Kenichi Kawaguchi, Nami Yasuoka, Hiroyasu YAMASHITA, Yoshiaki NAKATA
  • Publication number: 20140252528
    Abstract: In order to improve reliability by preventing an edge breakdown in a semiconductor photodetector having a mesa structure such as a mesa APD, the semiconductor photodetector comprises a mesa structure formed on a first semiconductor layer of the first conduction type formed on a semiconductor substrate, the mesa structure including a light absorbing layer for absorbing light, an electric field buffer layer for dropping an electric field intensity, an avalanche multiplication layer for causing avalanche multiplication to occur, and a second semiconductor layer of the second conduction type, wherein the thickness of the avalanche multiplication layer at the portion in the vicinity of the side face of the mesa structure is made thinner than the thickness at the central portion of the mesa structure.
    Type: Application
    Filed: May 21, 2014
    Publication date: September 11, 2014
    Applicants: FUJITSU LIMITED, SUMITOMO ELECTRIC DEVICE INNOVATIONS, INC.
    Inventors: Nami YASUOKA, Haruhiko KUWATSUKA, Toru UCHIDA, Yoshihiro YONEDA
  • Patent number: 8772896
    Abstract: In order to improve reliability by preventing an edge breakdown in a semiconductor photodetector having a mesa structure such as a mesa APD, the semiconductor photodetector includes a mesa structure formed on a first semiconductor layer of the first conduction type formed on a semiconductor substrate, the mesa structure including a light absorbing layer for absorbing light, an electric field buffer layer for dropping an electric field intensity, an avalanche multiplication layer for causing avalanche multiplication to occur, and a second semiconductor layer of the second conduction type, wherein the thickness of the avalanche multiplication layer at the portion in the vicinity of the side face of the mesa structure is made thinner than the thickness at the central portion of the mesa structure.
    Type: Grant
    Filed: November 22, 2010
    Date of Patent: July 8, 2014
    Assignees: Fujitsu Limited, Sumitomo Electric Device Innovations, Inc.
    Inventors: Nami Yasuoka, Haruhiko Kuwatsuka, Toru Uchida, Yoshihiro Yoneda
  • Patent number: 7968868
    Abstract: A side barrier is provided between columnar dots each constituted by directly stacking respective quantum dots in seven or more layers. Out of respective side barrier layers composing the side barrier, each of the lower side barrier layers (four layers of the undermost layer to the fourth layer from the bottom) is formed as a first side barrier layer into which a tensile strain is introduced, and each of the upper side barrier layers (three layers of the fifth layer to the uppermost layer from the bottom) is formed as a second side barrier layer which has no strain.
    Type: Grant
    Filed: December 8, 2009
    Date of Patent: June 28, 2011
    Assignee: Fujitsu Limited
    Inventors: Nami Yasuoka, Kenichi Kawaguchi
  • Publication number: 20110068428
    Abstract: In order to improve reliability by preventing an edge breakdown in a semiconductor photodetector having a mesa structure such as a mesa APD, the semiconductor photodetector comprises a mesa structure formed on a first semiconductor layer of the first conduction type formed on a semiconductor substrate, the mesa structure including a light absorbing layer for absorbing light, an electric field buffer layer for dropping an electric field intensity, an avalanche multiplication layer for causing avalanche multiplication to occur, and a second semiconductor layer of the second conduction type, wherein the thickness of the avalanche multiplication layer at the portion in the vicinity of the side face of the mesa structure is made thinner than the thickness at the central portion of the mesa structure.
    Type: Application
    Filed: November 22, 2010
    Publication date: March 24, 2011
    Applicant: FUJITSU LIMITED,
    Inventors: Nami Yasuoka, Haruhiko Kuwatsuka, Toru Uchida, Yoshihiro Yoneda
  • Patent number: 7875946
    Abstract: In order to improve reliability by preventing edge breakdown in a semiconductor photodetector having a mesa structure such as a mesa APD, the semiconductor photodetector includes a mesa structure formed on a first semiconductor layer of the first conduction type formed on a semiconductor substrate, the mesa structure including a light absorbing layer for absorbing light, an electric field buffer layer for dropping an electric field intensity, an avalanche multiplication layer for causing avalanche multiplication to occur, and a second semiconductor layer of the second conduction type, wherein the thickness of the avalanche multiplication layer at the portion in the vicinity of the side face of the mesa structure is made thinner than the thickness at the central portion of the mesa structure.
    Type: Grant
    Filed: October 27, 2005
    Date of Patent: January 25, 2011
    Assignees: Fujitsu Limited, Eudyna Devices Inc.
    Inventors: Nami Yasuoka, Haruhiko Kuwatsuka, Toru Uchida, Yoshihiro Yoneda
  • Publication number: 20100090196
    Abstract: A side barrier is provided between columnar dots each constituted by directly stacking respective quantum dots in seven or more layers. Out of respective side barrier layers composing the side barrier, each of the lower side barrier layers (four layers of the undermost layer to the fourth layer from the bottom) is formed as a first side barrier layer into which a tensile strain is introduced, and each of the upper side barrier layers (three layers of the fifth Layer to the uppermost layer from the bottom) is formed as a second side barrier layer which has no strain.
    Type: Application
    Filed: December 8, 2009
    Publication date: April 15, 2010
    Applicant: FUJITSU LIMITED
    Inventors: Nami Yasuoka, Kenichi Kawaguchi
  • Patent number: 7663139
    Abstract: A side barrier is provided between columnar dots each constituted by directly stacking respective quantum dots in seven or more layers. Out of respective side barrier layers composing the side barrier, each of the lower side barrier layers (four layers of the undermost layer to the fourth layer from the bottom) is formed as a first side barrier layer into which a tensile strain is introduced, and each of the upper side barrier layers (three layers of the fifth layer to the uppermost layer from the bottom) is formed as a second side barrier layer which has no strain.
    Type: Grant
    Filed: June 1, 2006
    Date of Patent: February 16, 2010
    Assignee: Fujitsu Limited
    Inventors: Nami Yasuoka, Kenichi Kawaguchi
  • Patent number: 7507600
    Abstract: A semiconductor photodetecting device including a PIN photodiode formed on an SI-InP substrate; a buried optical waveguide portion formed on the SI-InP substrate and including the film thickness continuously increased toward the PIN photodiode and an InP clad layer covering the upper surface and the side surface of the InGaAsP core layer; and a ridge-shaped connection optical waveguide portion formed on the SI-InP substrate between the PIN photodiode and the buried optical waveguide portion and including the InGaAsP core layer and the InP clad layer selectively covering only the upper surface of the InGaAsP core layer.
    Type: Grant
    Filed: July 14, 2005
    Date of Patent: March 24, 2009
    Assignee: Fujitsu Limited
    Inventors: Nami Yasuoka, Haruhiko Kuwatsuka, Akito Kuramata
  • Publication number: 20070194299
    Abstract: A side barrier is provided between columnar dots each constituted by directly stacking respective quantum dots in seven or more layers. Out of respective side barrier layers composing the side barrier, each of the lower side barrier layers (four layers of the undermost layer to the fourth layer from the bottom) is formed as a first side barrier layer into which a tensile strain is introduced, and each of the upper side barrier layers (three layers of the fifth layer to the uppermost layer from the bottom) is formed as a second side barrier layer which has no strain.
    Type: Application
    Filed: June 1, 2006
    Publication date: August 23, 2007
    Applicant: FUJITSU LIMITED
    Inventors: Nami Yasuoka, Kenichi Kawaguchi
  • Publication number: 20060273421
    Abstract: In order to improve reliability by preventing an edge breakdown in a semiconductor photodetector having a mesa structure such as a mesa APD, the semiconductor photodetector comprises a mesa structure formed on a first semiconductor layer of the first conduction type formed on a semiconductor substrate, the mesa structure including a light absorbing layer for absorbing light, an electric field buffer layer for dropping an electric field intensity, an avalanche multiplication layer for causing avalanche multiplication to occur, and a second semiconductor layer of the second conduction type, wherein the thickness of the avalanche multiplication layer at the portion in the vicinity of the side face of the mesa structure is made thinner than the thickness at the central portion of the mesa structure.
    Type: Application
    Filed: October 27, 2005
    Publication date: December 7, 2006
    Applicants: FUJITSU LIMITED, EUDYNA DEVICES, INC.
    Inventors: Nami Yasuoka, Haruhiko Kuwatsuka, Toru Uchida, Yoshihiro Yoneda
  • Publication number: 20050272180
    Abstract: A semiconductor photodetecting device including a PIN photodiode formed on an SI—InP substrate; a buried optical waveguide portion formed on the SI—InP substrate and including the film thickness continuously increased toward the PIN photodiode and an InP clad layer covering the upper surface and the side surface of the InGaAsP core layer; and a ridge-shaped connection optical waveguide portion formed on the SI—InP substrate between the PIN photodiode and the buried optical waveguide portion and including the InGaAsP core layer and the InP clad layer selectively covering only the upper surface of the InGaAsP core layer.
    Type: Application
    Filed: July 14, 2005
    Publication date: December 8, 2005
    Applicant: FUJITSU LIMITED
    Inventors: Nami Yasuoka, Haruhiko Kuwatsuka, Akito Kuramata
  • Patent number: 6943422
    Abstract: A semiconductor photodetecting device including a PIN photodiode formed on an SI-InP substrate; a buried optical waveguide portion formed on the SI-InP substrate and including the film thickness continuously increased toward the PIN photodiode and an InP clad layer covering the upper surface and the side surface of the InGaAsP core layer; and a ridge-shaped connection optical waveguide portion formed on the SI-InP substrate between the PIN photodiode and the buried optical waveguide portion and including the InGaAsP core layer and the InP clad layer selectively covering only the upper surface of the InGaAsP core layer.
    Type: Grant
    Filed: July 23, 2003
    Date of Patent: September 13, 2005
    Assignee: Fujitsu Limited
    Inventors: Nami Yasuoka, Haruhiko Kuwatsuka, Akito Kuramata
  • Patent number: 6906308
    Abstract: A plurality of semiconductor devices are disposed in a line on the surface of a supporting substrate. Each semiconductor device is adapted to generate an electric signal depending on the intensity of incident light. Adjacent semiconductor devices are optically coupled by an interconnecting optical waveguide so that light can pass through the semiconductor device one by one in a direction from a first stage closest to an input end to a last stage. An electric signal transmission line is formed of a pair of conductors connected to the semiconductor devices so that the electric signal generated by the semiconductor devices can propagate. One conductor of the pair of conductors of the electric signal transmission line is formed so as to extend in the air above the supporting substrate between adjacent semiconductor devices.
    Type: Grant
    Filed: March 27, 2002
    Date of Patent: June 14, 2005
    Assignee: Fujitsu Limited
    Inventors: Nami Yasuoka, Haruhisa Soda
  • Publication number: 20040145025
    Abstract: The semiconductor photodetecting device comprises a PIN photodiode formed on an SI-InP substrate 10; a buried optical waveguide portion 12a formed on the SI-InP substrate 10 and including the film thickness continuously increased toward the PIN photodiode 32 and an InP clad layer 20a covering the upper surface and the side surface of the InGaAsP core layer 18; and a ridge-shaped connection optical waveguide portion 12b formed on the SI-InP substrate 10 between the PIN photodiode 32 and the buried optical waveguide portion 12a and including the InGaAsP core layer 18 and the InP clad layer 20a selectively covering only the upper surface of the InGaAsP core layer 18.
    Type: Application
    Filed: July 23, 2003
    Publication date: July 29, 2004
    Applicant: FUJITSU LIMITED
    Inventors: Nami Yasuoka, Haruhiko Kuwatsuka, Akito Kuramata
  • Patent number: 6710378
    Abstract: A photo sensor is formed in a partial area of the principal surface of a substrate. The photo sensor includes a light reception layer parallel to the principal surface, the light reception layer being made of semiconductor and generating carriers in response to received light. A light waveguide is formed in a partial area of the principal surface of the substrate, the light waveguide propagating light in a direction parallel to the principal surface and introducing light into the light reception layer. A semi-insulating semiconductor film covers side faces of the photo sensor. A pair of electrodes flows current into the light reception layer of the photo sensor in a thickness direction of the light reception layer. A semiconductor light reception device having a structure suitable for high-speed operation and easy to manufacture is provided.
    Type: Grant
    Filed: August 25, 2000
    Date of Patent: March 23, 2004
    Assignees: Fujitsu Limited, Fujitsu Quantum Devices Limited
    Inventors: Masao Makiuchi, Nami Yasuoka, Haruhisa Soda, Takuya Fujii