Patents by Inventor NAN CHENG

NAN CHENG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240173819
    Abstract: A wafer grinding parameter optimization method and an electronic device are provided. The method includes the following. A natural frequency of a grinding wheel spindle of wafer processing equipment is obtained, and a grinding stability lobe diagram is generated accordingly. A grinding speed is selected based on a speed range of the grinding wheel spindle. Multiple grinding parameter combinations are determined based on the grinding speed. Multiple grinding simulation result combinations corresponding to the grinding parameter combinations are generated. A specific grinding parameter combination is selected based on each of the grinding simulation result combinations, and the wafer processing equipment is set accordingly.
    Type: Application
    Filed: September 12, 2023
    Publication date: May 30, 2024
    Applicant: GlobalWafers Co., Ltd.
    Inventors: Chih-Chun Cheng, Wen-Nan Cheng, Meng-Bi Lin, Chi-Feng Li, Tzu-Fan Chiang, Wei-Jen Chen, Chien Hung Chen, Hsiu Chi Liang, Ying-Ru Shih
  • Publication number: 20240178036
    Abstract: A device for aligning light-emitting diodes (LEDs) by using a carrier substrate is provided. The carrier substrate defines a plurality of positioning grooves, and each positioning groove is configured for accommodating one of the LEDs. The device includes a carrying part for carrying the carrier substrate, a vibration part connected to the carrying part and for vibrating the carrier substrate, and a magnetic generator on a side of the carrier substrate away from the positioning grooves. A method for aligning LEDs is also provided.
    Type: Application
    Filed: November 29, 2023
    Publication date: May 30, 2024
    Inventors: Hsin-Chieh Wu, Deng-Kai Chang, Tai-Hsing Lee, Sung-Nan Cheng
  • Publication number: 20240145379
    Abstract: Methods and semiconductor devices are provided. A method includes determining a location of a polyimide opening (PIO) corresponding to an under-bump metallization (UBM) feature in a die. The die includes a substrate and an interconnect structure over the substrate. The method also includes determining a location of a stacked via structure in the interconnect structure based on the location of the PIO. The method further includes forming, in the interconnect structure, the stacked via structure comprising at most three stacked contact vias at the location of the PIO.
    Type: Application
    Filed: February 23, 2023
    Publication date: May 2, 2024
    Inventors: Yen-Kun Lai, Wei-Hsiang Tu, Ching-Ho Cheng, Cheng-Nan Lin, Chiang-Jui Chu, Chien Hao Hsu, Kuo-Chin Chang, Mirng-Ji Lii
  • Patent number: 11953738
    Abstract: The present invention discloses a display including a display panel and a light redirecting film disposed on the viewing side of the display panel. The light redirecting film comprises a light redistribution layer, and a light guide layer disposed on the light redistribution layer. The light redistribution layer includes a plurality of strip-shaped micro prisms extending along a first direction and arranged at intervals and a plurality of diffraction gratings arranged at the bottom of the intervals between the adjacent strip-shaped micro prisms, wherein each of the strip-shaped micro prisms has at least one inclined light-guide surface, and the bottom of each interval has at least one set of diffraction gratings, and the light guide layer is in contact with the strip-shaped micro prisms and the diffraction gratings.
    Type: Grant
    Filed: March 29, 2022
    Date of Patent: April 9, 2024
    Assignee: BenQ Materials Corporation
    Inventors: Cyun-Tai Hong, Yu-Da Chen, Hsu-Cheng Cheng, Meng-Chieh Wu, Chuen-Nan Shen, Kuo-Jung Huang, Wei-Jyun Chen, Yu-Jyuan Dai
  • Publication number: 20240095178
    Abstract: A memory device and an operating method thereof are provided. The memory device includes a memory controller, an address transforming circuit, and a memory array. The memory controller generates a programming address among multiple candidate programming addresses according to an application. The address transforming circuit stores multiple physical address data and multiple mask data. The physical address data respectively correspond to the candidate programming addresses. The address transforming circuit executes a first logical calculation according to the programming address, the physical address data, and the mask data to generate a physical address. The memory controller executes an access operation on the memory array according to the physical address.
    Type: Application
    Filed: June 13, 2023
    Publication date: March 21, 2024
    Applicant: Nuvoton Technology Corporation
    Inventor: Min-Nan Cheng
  • Patent number: 11921001
    Abstract: A method and system for inspecting deviation in dynamic characteristics of a feeding system are provided, and the method includes: exciting the feeding system and detecting vibrations of a subcomponent of a component to be inspected of the feeding system to generate a monitoring excitation signal in a monitoring mode; calculating, by a modal analysis method, monitoring eigenvalues and monitoring eigenvectors of the monitoring excitation signal; determining, by a modal verification method, similarity between the monitoring eigenvalues and standard eigenvalues of a digital twin model and similarity between the monitoring eigenvectors and standard eigenvectors of the digital twin model; determining that the dynamic characteristics of the subcomponent are deviated, when the monitoring eigenvalues and monitoring eigenvectors are not similar to the standard eigenvalues and standard eigenvectors. Therefore, the subcomponent whose dynamic characteristics are deviated can be sensed remotely and precisely.
    Type: Grant
    Filed: March 11, 2022
    Date of Patent: March 5, 2024
    Assignee: Hiwin Technologies Corp.
    Inventors: Hsien-Yu Chen, Yu-Sheng Chiu, Chih-Chun Cheng, Wen-Nan Cheng, Chi-Ming Liu
  • Publication number: 20240071665
    Abstract: A wheel control mechanism includes a support base, a wheel module, a first magnetic module and a second magnetic module. The wheel module, the first magnetic module and the second magnetic module are installed on the support base. The first magnetic module generates a magnetic attractive force to attract a metal ratchet of the wheel module. By adjusting the position of the second magnetic module relative to the first magnetic module, the strength of the magnetic attractive force is changed. Consequently, the rotation of the wheel module results in a tactile feel or does not result in the tactile feel.
    Type: Application
    Filed: September 14, 2022
    Publication date: February 29, 2024
    Inventors: Chun-Nan Su, Chun-Che Wu, Sheng-An Tsai, Ming-Hao Hsieh, Li-Kuei Cheng
  • Patent number: 11908759
    Abstract: A semiconductor device includes a substrate, a body structure and an electronic component. The body structure is disposed above the substrate and includes a semiconductor die, a molding compound, a conductive component and a lower redistribution layer (RDL). The semiconductor die has an active surface. The molding compound encapsulates the semiconductor die and has a lower surface, an upper surface opposite to the lower surface and a through hole extending to the upper surface from the lower surface. The conductive component is formed within the through hole. The lower RDL is formed on the lower surface of the molding compound, the active surface of the semiconductor die and the conductive component exposed from the lower surface. The electronic component is disposed above the upper surface of the molding compound and electrically connected to the lower RDL through the conductive component.
    Type: Grant
    Filed: March 3, 2021
    Date of Patent: February 20, 2024
    Assignee: MediaTek Inc.
    Inventors: Nan-Cheng Chen, Che-Ya Chou, Hsing-Chih Liu, Che-Hung Kuo
  • Patent number: 11848481
    Abstract: A semiconductor package includes a substrate having thereon at least an antenna layer and a ground reflector layer under the antenna layer, a radio frequency (RF) die disposed on or in the substrate, a molding compound disposed on the antenna layer of the substrate, and a frequency-selective surface (FSS) structure disposed on the molding compound. The FSS structure is a two-dimensional periodic array of metal patterns of same shape and size. The FSS structure has highly reflective characteristic.
    Type: Grant
    Filed: April 4, 2022
    Date of Patent: December 19, 2023
    Assignee: MediaTek Inc.
    Inventors: Shih-Chia Chiu, Yen-Ju Lu, Wen-Chou Wu, Nan-Cheng Chen
  • Patent number: 11837552
    Abstract: A semiconductor package includes a first substrate, a first layer structure, a second layer structure, a first antenna layer and an electronic component. The first antenna layer is formed on at least one of the first layer structure and the second layer structure, wherein the first antenna layer has an upper surface flush with a layer upper surface of the first layer structure or the second layer structure. The electronic component is disposed on a substrate lower surface of the first substrate and exposed from the first substrate. The first layer structure is formed between the first substrate and the second layer structure.
    Type: Grant
    Filed: May 19, 2022
    Date of Patent: December 5, 2023
    Assignee: MediaTek Inc.
    Inventors: Wen-Sung Hsu, Tao Cheng, Nan-Cheng Chen, Che-Ya Chou, Wen-Chou Wu, Yen-Ju Lu, Chih-Ming Hung, Wei-Hsiu Hsu
  • Patent number: 11822405
    Abstract: The present disclosure provides a power allocating system, including adapters and an electronic device. Each of the adapters includes a processor. The electronic device includes a controller. The controller obtains rated information and current output information from each of the processors to calculate an output utilization rate of each of the adapters. The controller transmits at least one adjusting signal to at least one of the processors according to the output utilization rates to adjust the output utilization rate of the adapters.
    Type: Grant
    Filed: November 26, 2020
    Date of Patent: November 21, 2023
    Assignee: ASUSTEK COMPUTER INC.
    Inventors: Tzu-Nan Cheng, Yu-Cheng Shen
  • Patent number: 11761829
    Abstract: A sensor placement optimization device is provided, which may include a preprocessing circuit and an operational circuit. The preprocessing circuit may perform a pre-process for the sensing signals of a plurality of temperature sensors, installed on a machine tool, to generate a pre-processed data. The operational circuit may execute a normalization for the pre-processed data to generate a normalized data, perform a principal component analysis for the normalized data to generate a dimensionality-reduced data and implement a principal component regression for the dimensionality-reduced data to obtain the contributions of the temperature sensors. Then, the operational circuit may rank the temperature sensors according to the contributions thereof to generate a ranking result and execute a screening process according to the ranking result to select at least one redundant sensor from the temperature sensors; afterward, the operational circuit may remove the redundant sensor from the temperature sensors.
    Type: Grant
    Filed: October 23, 2020
    Date of Patent: September 19, 2023
    Assignee: NATIONAL CHUNG CHENG UNIVERSITY
    Inventors: Chih-Chun Cheng, Wen-Nan Cheng, Ping-Chun Tsai, Shao-Rong Su, Yao-Huan Lei, Wei-Jen Chen
  • Publication number: 20230288290
    Abstract: A method and system for inspecting deviation in dynamic characteristics of a feeding system are provided, and the method includes: exciting the feeding system and detecting vibrations of a subcomponent of a component to be inspected of the feeding system to generate a monitoring excitation signal in a monitoring mode; calculating, by a modal analysis method, monitoring eigenvalues and monitoring eigenvectors of the monitoring excitation signal; determining, by a modal verification method, similarity between the monitoring eigenvalues and standard eigenvalues of a digital twin model and similarity between the monitoring eigenvectors and standard eigenvectors of the digital twin model; determining that the dynamic characteristics of the subcomponent are deviated, when the monitoring eigenvalues and monitoring eigenvectors are not similar to the standard eigenvalues and standard eigenvectors. Therefore, the subcomponent whose dynamic characteristics are deviated can be sensed remotely and precisely.
    Type: Application
    Filed: March 11, 2022
    Publication date: September 14, 2023
    Inventors: Hsien-Yu CHEN, Yu-Sheng CHIU, Chih-Chun CHENG, Wen-Nan CHENG, Chi-Ming LIU
  • Patent number: 11721882
    Abstract: One embodiment of the present disclosure provides a semiconductor package including a bottom chip package having a first side and a second side opposing the first side, and a top antenna package mounted on the first side of the bottom chip package. The bottom chip package further includes a semiconductor chip. The semiconductor chip may include a RFIC chip. The top antenna package has at least one radiative antenna element.
    Type: Grant
    Filed: October 20, 2020
    Date of Patent: August 8, 2023
    Assignee: MediaTek Inc.
    Inventors: Fu-Yi Han, Che-Ya Chou, Che-Hung Kuo, Wen-Chou Wu, Nan-Cheng Chen, Min-Chen Lin, Hsing-Chih Liu
  • Publication number: 20230244826
    Abstract: A method and a system for building digital twin models allow the setting of a shape and dimensions of a simplified geometric solid corresponding to a component of a feeding system; after sampling the solid to obtain second position data, calculates a set of model eigenvalues and a set of model eigenvectors by a modal analysis method according to a material data of the component, the second position data and second size data of the solid; and defines the solid as a digital twin model of the component when it is determined by a modal verification method that a set of actual eigenvectors of the component is similar to the set of model eigenvectors. Data amounts of the second position and size data are far less than data amounts of first position and size data of an image of the component.
    Type: Application
    Filed: January 28, 2022
    Publication date: August 3, 2023
    Inventors: Po-Lin Lee, Hsien-Yu Chen, Yu-Sheng Chiu, Wen-Nan Cheng, Chih-Chun Cheng
  • Publication number: 20230214491
    Abstract: A firmware verification system is suitable for a secure boot stage. The firmware verification system comprises a non-volatile firmware list storage device. The non-volatile firmware list storage device is configured to store a firmware list; wherein each entry corresponds to a firmware stored in a flash memory in a microcontroller, and each entry includes a plurality of fields. The bootloader reads the entries. According to the contents of the fields in each entry, the bootloader determines the correctness of the public key and the correctness of the digital signature for each firmware in the microcontroller.
    Type: Application
    Filed: October 13, 2022
    Publication date: July 6, 2023
    Inventor: Min-Nan CHENG
  • Publication number: 20230189075
    Abstract: A wireless communication network resource allocation method implemented in a server in a wireless communication network, includes: obtaining task feature information of each user device and a CPU frequency of the server in each time slot; obtaining a task data volume average value; determining, based on a knowledge base including sample data groups and optimal resource allocation models, a target optimal resource allocation model matched with the task data volume average value and the CPU frequency of the server; obtaining, based on the task feature information of the user devices in the time slot and the target optimal resource allocation model, resource allocation results of the user devices, and transmitting task data to the user devices based on the results. A width of a dynamic neural network can be automatically adjusted according to task features and computational capacity, and on-demand adjustment of decision speed and resource optimality can be realized.
    Type: Application
    Filed: July 4, 2022
    Publication date: June 15, 2023
    Inventors: Nan Cheng, Changle Li, Longfei Ma, Xiucheng Wang, Ruijin Sun
  • Publication number: 20230075293
    Abstract: A detection device using a lateral flow strip for detection and a detection method thereof are provided, which relates to the technical field of a detection device using a lateral flow strip. An upper rotor, a middle rotor and a lower rotor are respectively provided with upper paddle(s), middle paddle(s) and lower paddle(s) along respective circumferential directions. Each upper paddle is provided with a test tube with openings at both ends thereof for placing the lateral flow strip. The middle paddle blocks a bottom one of the openings of the test tube. Each lower paddle is provided with a sample tube for placing sample solution. The bottom opening of the test tube is opposite to a top opening of the sample tube up and down.
    Type: Application
    Filed: October 27, 2021
    Publication date: March 9, 2023
    Applicant: CHINA AGRICULTURAL UNIVERSITY
    Inventors: Nan CHENG, Xiaoyun HE, Wentao XU, Kunlun HUANG, Yunbo LUO, Qian ZHANG, Qingliang LIU
  • Publication number: 20230052643
    Abstract: The present invention is related to a carboxylated styrene butadiene polymer latex, a method for making such and its application as binders for paper coating. In particular, the latex shows excellent wet rub performance and peel off performance. The latex may find applications as binders for paper coating.
    Type: Application
    Filed: December 21, 2020
    Publication date: February 16, 2023
    Inventors: Nan CHENG, Titus David LEMAN, Soehari LIONO, Nadaraja SUBRAMANIAM
  • Publication number: 20220352084
    Abstract: A semiconductor package includes a first substrate, a first layer structure, a second layer structure, a first antenna layer and an electronic component. The first antenna layer is formed on at least one of the first layer structure and the second layer structure, wherein the first antenna layer has an upper surface flush with a layer upper surface of the first layer structure or the second layer structure. The electronic component is disposed on a substrate lower surface of the first substrate and exposed from the first substrate. The first layer structure is formed between the first substrate and the second layer structure.
    Type: Application
    Filed: May 19, 2022
    Publication date: November 3, 2022
    Applicant: MediaTek Inc.
    Inventors: Wen-Sung Hsu, Tao Cheng, Nan-Cheng Chen, Che-Ya Chou, Wen-Chou Wu, Yen-Ju Lu, Chih-Ming Hung, Wei-Hsiu Hsu