Patents by Inventor Nan-Chou D. Liu

Nan-Chou D. Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5725407
    Abstract: A process is described for the manufacture of a luminescent screen that eliminates image distorting or crosstalk effects resulting from secondary and back-scattered electrons that end up in adjoining sub-pixels. An unusually thick (ca. 70 microns) black matrix is first formed on the substrate surface and is given a tapered cross-sectional shape such that it is smaller at its top surface than at the substrate surface. Said tapered profile may be achieved through a screen-on process or by an overetching process. This is followed by the deposition of a transparent conductive layer, such as ITO, onto which the various layers of different phosphors that make up the sub-pixels of the display are deposited by means of electrophoresis.
    Type: Grant
    Filed: April 8, 1996
    Date of Patent: March 10, 1998
    Assignee: Industrial Technology Research Institute
    Inventors: Nan-Chou D. Liu, Jammy Chin-Ming Huang, Jin-Yuh Lu
  • Patent number: 5624872
    Abstract: A process is described for manufacturing a field emission device that has low capacitance as well as low internal resistance. The process begins with the provision of an insulating substrate on which cathode columns and orthonal gate lines, separated by a relatively thick insulating layer (to reduce capacitance), have been formed. Openings in the gate lines, located above the cathode columns and extending down to the level of the insulating layer, are then formed. Using the gate lines as a mask, the insulating layer is then etched down to the level of the cathode columns, thereby forming wells in the insulating layer. These wells are then filled with additional conductive material which is then partially removed. This results in the formation of conductive pedestals, inside the wells, on which the microtips (which are then formed in the usual manner) rest. This allows the microtips to retain electrical contact with the cathode columns while still keeping their apexes in line with the gate line openings.
    Type: Grant
    Filed: April 8, 1996
    Date of Patent: April 29, 1997
    Assignee: Industrial Technology Research Institute
    Inventor: Nan-Chou D. Liu