Patents by Inventor Naofumi Iwamoto

Naofumi Iwamoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7820007
    Abstract: This silicon electrode plate for plasma etching is a silicon electrode plate for plasma etching with superior durability including silicon single crystal which, in terms of atomic ratio, contains 3 to 11 ppba of boron, and further contains a total of 0.5 to 6 ppba of either or both of phosphorus and arsenic.
    Type: Grant
    Filed: March 30, 2005
    Date of Patent: October 26, 2010
    Assignees: Sumco Corporation, Mitsubishi Materials Corporation
    Inventors: Hideki Fujiwara, Kazuhiro Ikezawa, Hiroaki Taguchi, Naofumi Iwamoto, Toshinori Ishii, Takashi Komekyu
  • Publication number: 20070181868
    Abstract: This silicon electrode plate for plasma etching is a silicon electrode plate for plasma etching with superior durability including silicon single crystal which, in terms of atomic ratio, contains 3 to 11 ppba of boron, and further contains a total of 0.5 to 6 ppba of either or both of phosphorus and arsenic.
    Type: Application
    Filed: March 30, 2005
    Publication date: August 9, 2007
    Applicants: SUMCO CORPORATION, Mitsubishi Materials Corporation
    Inventors: Hideki Fujiwara, Kazuhiro Ikezawa, Hiroaki Taguchi, Naofumi Iwamoto, Toshinori Ishii, Takashi Komekyu
  • Patent number: 6841462
    Abstract: A semiconductor chip includes a substrate having a main surface, the main surface including a flame-shaped first area, which is along sides of the main surface, and a second area encompassed by the first area, a pad formed in the first area and a bump electrode formed on the pad, and at least one supporting member formed in the second area.
    Type: Grant
    Filed: November 21, 2003
    Date of Patent: January 11, 2005
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Naofumi Iwamoto
  • Publication number: 20040104476
    Abstract: A semiconductor chip includes a substrate having a main surface, the main surface including a flame-shaped first area, which is along sides of the main surface, and a second area encompassed by the first area, a pad formed in the first area and a bump electrode formed on the pad, and at least one supporting member formed in the second area.
    Type: Application
    Filed: November 21, 2003
    Publication date: June 3, 2004
    Inventor: Naofumi Iwamoto
  • Patent number: 6683369
    Abstract: A semiconductor chip includes a substrate having a main surface, the main surface including a flame-shaped first area, which is along sides of the main surface, and a second area encompassed by the first area, a pad formed in the first area and a bump electrode formed on the pad, and at least one supporting member formed in the second area.
    Type: Grant
    Filed: July 18, 2002
    Date of Patent: January 27, 2004
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Naofumi Iwamoto
  • Patent number: 6617864
    Abstract: A probe whose characteristic impedance can be accurately adjusted to a desired value with the production of a small number of prototypes. The probe includes a first line with a signal terminal to be connected to a signal electrode of a circuit to be measured and at least one first region connected to the signal terminal and to which one end of a chip capacitor is connected, a second line connected to a terminal of the first line and a junction to be connected to a measuring instrument at the remaining terminal, and an impedance matched to a characteristic impedance of the measuring instrument, a ground connector with a ground terminal to be connected to the ground electrode of the circuit to be measured, and at least one second region connected to the ground terminal and on which the remaining terminal of the chip capacitor is mounted in one-to-one correspondence with the first region.
    Type: Grant
    Filed: December 20, 2000
    Date of Patent: September 9, 2003
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Akira Inoue, Takayuki Katoh, Takeshi Aso, Naofumi Iwamoto, Takumi Suetsugu
  • Publication number: 20030017654
    Abstract: A semiconductor chip includes a substrate having a main surface, the main surface including a flame-shaped first area, which is along sides of the main surface, and a second area encompassed by the first area, a pad formed in the first area and a bump electrode formed on the pad, and at least one supporting member formed in the second area.
    Type: Application
    Filed: July 18, 2002
    Publication date: January 23, 2003
    Inventor: Naofumi Iwamoto
  • Publication number: 20010017549
    Abstract: Provided is a probe whose characteristic impedance can be accurately adjusted to the desired value with the production of a small number of prototypes.
    Type: Application
    Filed: December 20, 2000
    Publication date: August 30, 2001
    Inventors: Akira Inoue, Takayuki Katoh, Takeshi Aso, Naofumi Iwamoto, Takumi Suetsugu
  • Patent number: 6019274
    Abstract: A reflow mounting method and a semiconductor device for efficient manufacture of TCPs superior in reliability by preventing the deformation of leads and ensuring a dependable contact between the bonding pads on a circuit board and the leads, wherein metal pieces arranged as weights on the leads are temporarily positioned adequately to specified bonding pads, thus restraining the leads from shifting from appropriate positions, which may occur if the leads deform, and wherein the metal pieces become wettable by bonding agent when heated, thus making sure that the leads are firmly fixed between the metal pieces and the bonding pads.
    Type: Grant
    Filed: May 16, 1997
    Date of Patent: February 1, 2000
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Naofumi Iwamoto