Patents by Inventor Naohiro Kobayashi

Naohiro Kobayashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11912878
    Abstract: A method of producing organic-inorganic hybrid infrared absorbing particles includes a dispersion liquid preparing step of preparing a dispersion liquid containing infrared absorbing particles, a dispersant, and a dispersion medium; a dispersion medium removing step of removing the dispersion medium from the dispersion liquid by an evaporation; a raw material mixture liquid preparing step of preparing a raw material mixture liquid containing the infrared absorbing particles collected after the dispersion medium removing step, a coating resin material, an organic solvent, an emulsifying agent, water, and a polymerization initiator; a stirring step of stirring the raw material mixture liquid while cooling; and a polymerizing step of polymerizing the coating resin material after deoxygenation treatment which reduces an amount of oxygen in the raw material mixture liquid.
    Type: Grant
    Filed: December 16, 2019
    Date of Patent: February 27, 2024
    Assignees: SUMITOMO METAL MINING CO., LTD., NATIONAL UNIVERSITY CORPORATION YAMAGATA UNIVERSITY
    Inventors: Hirofumi Tsunematsu, Takeshi Chonan, Atsushi Tofuku, Seigou Kawaguchi, Naohiro Kobayashi
  • Patent number: 11803159
    Abstract: An electronic timepiece that shortens the time from starting to completing indicator position detection. The electronic timepiece 1 an indicator 11; an actuator 12 that drives the indicator 11; a light emitter 21; a photodetector 22 that detects light emitted from the light emitter 21 selectively when when the indicator 11 is at a reference position; and a control circuit 35 that executes a first mode to drive the indicator 11 continuously in one direction until the indicator 11 is detected while the light emitter 21 is emitting, and a second mode to alternately drive the indicator 11 and drive the light emitter 21 to emit to detect the indicator 11 at the reference position after the photodetector 22 detects light in the first mode and the indicator 11 has past the reference position.
    Type: Grant
    Filed: October 15, 2019
    Date of Patent: October 31, 2023
    Inventor: Naohiro Kobayashi
  • Patent number: 11664752
    Abstract: A method for controlling an electronic watch is a method for controlling an electronic watch having a control device, the method comprising: when performing a first control processing, operating a first driving circuit to output a first motor drive signal, and rewriting a first polarity information in accordance with an output of the first motor drive signal, when ending output of the first motor drive signal, matching a second polarity information with the first polarity information, when performing a second control processing, operating a second driving circuit to output a second motor drive signal, and rewriting the second polarity information in accordance with an output of the second motor drive signal, and when ending output of the second motor drive signal, matching the first polarity information with the second polarity information.
    Type: Grant
    Filed: August 5, 2021
    Date of Patent: May 30, 2023
    Inventor: Naohiro Kobayashi
  • Patent number: 11391905
    Abstract: A lens unit can inhibit deterioration in optical characteristics caused due to deformation of resin lens. The lens unit includes: a metal lens barrel; a plurality of lenses arranged on the inner peripheral side of the lens barrel in the axial direction thereof; and an annular intermediate ring disposed between the lenses adjacent to each other in the axial direction. The intermediate ring is made of metal and has a convex portion formed toward the image side or the object side. The lens is made of resin, having a concave portion fitted with the convex portion. A gap formed between the outer peripheral surface of the lens and the inner peripheral surface of the lens barrel is larger than a gap formed between the outer peripheral surface of the intermediate ring and the inner peripheral surface of the lens barrel.
    Type: Grant
    Filed: December 13, 2018
    Date of Patent: July 19, 2022
    Assignee: MAXELL, LTD.
    Inventors: Hidehiro Endo, Naohiro Kobayashi
  • Publication number: 20220049105
    Abstract: A method of producing organic-inorganic hybrid infrared absorbing particles includes a dispersion liquid preparing step of preparing a dispersion liquid containing infrared absorbing particles, a dispersant, and a dispersion medium; a dispersion medium removing step of removing the dispersion medium from the dispersion liquid by an evaporation; a raw material mixture liquid preparing step of preparing a raw material mixture liquid containing the infrared absorbing particles collected after the dispersion medium removing step, a coating resin material, an organic solvent, an emulsifying agent, water, and a polymerization initiator; a stirring step of stirring the raw material mixture liquid while cooling; and a polymerizing step of polymerizing the coating resin material after deoxygenation treatment which reduces an amount of oxygen in the raw material mixture liquid.
    Type: Application
    Filed: December 16, 2019
    Publication date: February 17, 2022
    Inventors: Hirofumi TSUNEMATSU, Takeshi CHONAN, Atsushi TOFUKU, Seigou KAWAGUCHI, Naohiro KOBAYASHI
  • Publication number: 20220045636
    Abstract: A method for controlling an electronic watch is a method for controlling an electronic watch having a control device, the method comprising: when performing a first control processing, operating a first driving circuit to output a first motor drive signal, and rewriting a first polarity information in accordance with an output of the first motor drive signal, when ending output of the first motor drive signal, matching a second polarity information with the first polarity information, when performing a second control processing, operating a second driving circuit to output a second motor drive signal, and rewriting the second polarity information in accordance with an output of the second motor drive signal, and when ending output of the second motor drive signal, matching the first polarity information with the second polarity information.
    Type: Application
    Filed: August 5, 2021
    Publication date: February 10, 2022
    Inventor: Naohiro KOBAYASHI
  • Publication number: 20210165184
    Abstract: A lens unit can inhibit deterioration in optical characteristics caused due to deformation of resin lens. The lens unit includes: a metal lens barrel; a plurality of lenses arranged on the inner peripheral side of the lens barrel in the axial direction thereof; and an annular intermediate ring disposed between the lenses adjacent to each other in the axial direction. The intermediate ring is made of metal and has a convex portion formed toward the image side or the object side. The lens is made of resin, having a concave portion fitted with the convex portion. A gap formed between the outer peripheral surface of the lens and the inner peripheral surface of the lens barrel is larger than a gap formed between the outer peripheral surface of the intermediate ring and the inner peripheral surface of the lens barrel.
    Type: Application
    Filed: December 13, 2018
    Publication date: June 3, 2021
    Applicant: MAXELL, LTD.
    Inventors: Hidehiro ENDO, Naohiro KOBAYASHI
  • Publication number: 20200117144
    Abstract: An electronic timepiece that shortens the time from starting to completing indicator position detection. The electronic timepiece 1 an indicator 11; an actuator 12 that drives the indicator 11; a light emitter 21; a photodetector 22 that detects light emitted from the light emitter 21 selectively when when the indicator 11 is at a reference position; and a control circuit 35 that executes a first mode to drive the indicator 11 continuously in one direction until the indicator 11 is detected while the light emitter 21 is emitting, and a second mode to alternately drive the indicator 11 and drive the light emitter 21 to emit to detect the indicator 11 at the reference position after the photodetector 22 detects light in the first mode and the indicator 11 has past the reference position.
    Type: Application
    Filed: October 15, 2019
    Publication date: April 16, 2020
    Inventor: Naohiro KOBAYASHI
  • Patent number: 9411318
    Abstract: When an operation button is pressed for three seconds, a second hand is reversed and fast-forwarded to the position of a currently set time difference. After the second hand stops, the second hand is moved stepwise to time difference display positions to continuously display time difference correction candidates. In this state, when the operation button is pressed, the second hand is caused to stop, and an hour hand is moved to the position of time determined in consideration of the time difference at which the second hand points. The time difference at which the second hand points is stored as a time difference set value, and an action mode is switched to a normal time display mode for time-difference time display based on the time difference set value.
    Type: Grant
    Filed: March 18, 2015
    Date of Patent: August 9, 2016
    Assignee: Seiko Epson Corporation
    Inventor: Naohiro Kobayashi
  • Publication number: 20150268635
    Abstract: When an operation button is pressed for three seconds, a second hand is reversed and fast-forwarded to the position of a currently set time difference. After the second hand stops, the second hand is moved stepwise to time difference display positions to continuously display time difference correction candidates. In this state, when the operation button is pressed, the second hand is caused to stop, and an hour hand is moved to the position of time determined in consideration of the time difference at which the second hand points. The time difference at which the second hand points is stored as a time difference set value, and an action mode is switched to a normal time display mode for time-difference time display based on the time difference set value.
    Type: Application
    Filed: March 18, 2015
    Publication date: September 24, 2015
    Inventor: Naohiro KOBAYASHI
  • Patent number: 8341560
    Abstract: This is a method of designing a semiconductor device.
    Type: Grant
    Filed: July 15, 2010
    Date of Patent: December 25, 2012
    Assignee: Renesas Electronics Corporation
    Inventor: Naohiro Kobayashi
  • Patent number: 8239803
    Abstract: A layout method of a semiconductor integrated circuit by using cell library data includes specifying a gate in a predetermined cell as a reference gate, and automatically arranging a plurality of cells by a computer such that a number of gates arranged in an area in a predetermined distance from the reference gate meets a preset gate data density condition.
    Type: Grant
    Filed: July 27, 2011
    Date of Patent: August 7, 2012
    Assignee: Renesas Electronics Corporation
    Inventor: Naohiro Kobayashi
  • Patent number: 8219965
    Abstract: A layout design method of a semiconductor integrated circuit includes providing a cell layout including a cell that includes a gate or a plurality of gates extending in a first direction, a plurality of diffusion layers, a first boundary of the cell in parallel with the gate or the plurality of gates, a second boundary of the cell being in an opposite side of the first boundary of the cell, a first distance, a second distance, a third distance, and a fourth distance, regenerating the cell layout to set the first distance and the second distance to a first value, or to set the third distance and the fourth distance to a second value, and generating a library data of the cell for a placement and routing tool, based on the cell layout.
    Type: Grant
    Filed: June 29, 2011
    Date of Patent: July 10, 2012
    Assignee: Renesas Electronics Corporation
    Inventor: Naohiro Kobayashi
  • Patent number: 8122386
    Abstract: The load of OPC processing (especially, the load of bias processing) has been increasing due to optical effects involved in the placement of a dummy pattern. A pattern placement apparatus places dummy patterns in a layout region where a plurality of wiring patterns is placed. The pattern placement apparatus comprises: a placement region setting section that sets a placement region, where each of the dummy patterns should be placed, in an intermediate region between the adjacent wiring patterns at substantially constant intervals to the adjacent writing patterns; and a pattern placement section that places the dummy pattern in the placement region.
    Type: Grant
    Filed: August 12, 2008
    Date of Patent: February 21, 2012
    Assignee: Renesas Electronics Corporation
    Inventor: Naohiro Kobayashi
  • Patent number: 8072078
    Abstract: A semiconductor device includes a plurality of wiring patterns arranged in a first wiring layer of the semiconductor device and extending in a first direction, and a plurality of dummy patterns arranged in the first wiring layer and extending in a second direction different from the first direction, wherein each of the plurality of dummy patterns is arranged spaced apart from each of the plurality of wiring patterns and includes one or more dummy lands formed by separating a part of the dummy pattern opposed to the wiring pattern, from the rest part of the dummy pattern.
    Type: Grant
    Filed: December 7, 2009
    Date of Patent: December 6, 2011
    Assignee: Renesas Electronics Corporation
    Inventor: Naohiro Kobayashi
  • Publication number: 20110289467
    Abstract: A layout method of a semiconductor integrated circuit by using cell library data includes specifying a gate in a predetermined cell as a reference gate, and automatically arranging a plurality of cells by a computer such that a number of gates arranged in an area in a predetermined distance from the reference gate meets a preset gate data density condition.
    Type: Application
    Filed: July 27, 2011
    Publication date: November 24, 2011
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventor: Naohiro Kobayashi
  • Publication number: 20110265056
    Abstract: A layout design method of a semiconductor integrated circuit includes providing a cell layout including a cell that includes a gate or a plurality of gates extending in a first direction, a plurality of diffusion layers, a first boundary of the cell in parallel with the gate or the plurality of gates, a second boundary of the cell being in an opposite side of the first boundary of the cell, a first distance, a second distance, A third distance, and a fourth distance, regenerating the cell layout to set the first distance and the second distance to a first value, or to set the third distance and the fourth distance to a second value, and generating a library data of the cell for a placement and routing tool, based on the cell layout.
    Type: Application
    Filed: June 29, 2011
    Publication date: October 27, 2011
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventor: Naohiro Kobayashi
  • Patent number: 8020121
    Abstract: In a layout method for a semiconductor integrated circuit by using cell library data, a plurality of cell patterns are arranged in a first direction. One of gate patterns in one of the plurality of cell patterns is specified as a reference gate pattern. An additional cell pattern is arranged in a second direction orthogonal to the first direction such that a number of gate patterns within a predetermined area containing the reference gate pattern satisfies a constraint condition.
    Type: Grant
    Filed: September 2, 2008
    Date of Patent: September 13, 2011
    Assignee: Renesas Electronics Corporation
    Inventor: Naohiro Kobayashi
  • Patent number: 8001517
    Abstract: A semiconductor integrated circuit includes multiple cells each containing transistors. The transistors include a gate and diffusion layers. The multiple cells are adjacently formed in a first direction perpendicular to the gate. The distance between the cell border and the adjacent and corresponding diffusion layer, the first direction, is the same.
    Type: Grant
    Filed: November 23, 2009
    Date of Patent: August 16, 2011
    Assignee: Renesas Electronics Corporation
    Inventor: Naohiro Kobayashi
  • Publication number: 20110055776
    Abstract: This is a method of designing a semiconductor device.
    Type: Application
    Filed: July 15, 2010
    Publication date: March 3, 2011
    Inventor: Naohiro Kobayashi