Patents by Inventor Naohiro Konya

Naohiro Konya has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5436182
    Abstract: A thin-film transistor panel is constituted by forming, on an insulating substrate, a plurality of thin-film transistors, a plurality of gate lines for each connecting gate electrodes of the thin-film transistors, and a plurality of pixel electrodes formed of a transparent conductive film connected to the thin-film transistors, then forming a low-resistance metal film of an Al or Al alloy for a data line and a surface metal film of Cr with a high density, forming a photoresist film of a predetermined pattern on the surface metal film, and etching the data line metal film and surface metal film. Then, the surface metal film remaining on the data line metal film is eliminated.
    Type: Grant
    Filed: May 17, 1993
    Date of Patent: July 25, 1995
    Assignee: Casio Comupter Co., Ltd.
    Inventors: Naohiro Konya, Makoto Sasaki
  • Patent number: 5422293
    Abstract: A TFT panel is manufactured by a process of forming an oxide voltage-apply lines, gate lines, and capacitor lines on an insulating substrate, and a process of forming thin-film transistors, pixel electrodes, data lines, and ground lines. In a state that one end of the gate line and both ends of the capacitor line are connected to the oxide voltage-apply line, oxide films are formed on the surfaces of the gate line and the capacitor line by anodization. After forming the oxide film, the gate line and the capacitor line are electrically separated from the oxide voltage-apply line.
    Type: Grant
    Filed: December 18, 1992
    Date of Patent: June 6, 1995
    Assignee: Casio Computer Co., Ltd.
    Inventor: Naohiro Konya
  • Patent number: 5367179
    Abstract: A thin-film transistor comprises a gate electrode formed on an insulating substrate, a gate insulating film covering the gate electrode and the insulating substrate, an i-type semiconductor layer formed on the gate insulating film, and a source electrode and a drain electrode electrically connected to two ends of the i-type semiconductor layer, respectively. The gate electrode is made of aluminum alloy containing high-melting-point metal such as Ti and Ta and oxygen or nitrogen or both.
    Type: Grant
    Filed: November 12, 1992
    Date of Patent: November 22, 1994
    Assignee: Casio Computer Co., Ltd.
    Inventors: Hisatoshi Mori, Syunichi Sato, Naohiro Konya, Ichiro Ohno, Hiromitsu Ishii, Kunihiro Matsuda, Junji Shiota
  • Patent number: 5352907
    Abstract: A thin-film transistor includes a gate electrode and a semiconductor film consisting of amorphous silicon, formed on an insulating substrate to oppose each other through a gate insulating film, ohmic contact layers composed of n-type amorphous silicon doped with an impurity, electrically insulated from each other on the semiconductor film, and electrically connected to the semiconductor film, and source and drain electrodes arranged on the semiconductor film with a predetermined gap to form a channel portion, and electrically connected to the semiconductor film through the ohmic contact layers. The gate electrode and a portion surrounding the gate electrode are entirely formed into a continuous metal oxide film by a chemical reaction.
    Type: Grant
    Filed: March 24, 1992
    Date of Patent: October 4, 1994
    Assignee: Casio Computer Co., Ltd.
    Inventors: Kunihiro Matsuda, Hiromitsu Ishii, Naohiro Konya
  • Patent number: 5284789
    Abstract: Method of forming a thin film consisting of a silicon-based material includes a first step of setting a substrate subjected to formation of a thin insulating film consisting of the silicon-based material in a chamber having high-frequency electrodes for receiving a high-frequency power while the substrate is kept heated at a predetermined temperature, a second step of supplying a process gas to the chamber, a third step of applying a high-frequency power to the high-frequency electrodes to generate a plasma, a fourth step of depositing an insulator consisting of the silicon-based material on the substrate to a predetermined thickness while gas supply in the second step and supply of the high-frequency power in the third step are kept maintained, and a fifth step of cooling the substrate on which the insulating film is formed and unloading the substrate from the chamber. In the fourth step, the substrate is kept heated within the temperature range of 230.degree. C. to 270.degree. C.
    Type: Grant
    Filed: April 23, 1991
    Date of Patent: February 8, 1994
    Assignee: Casio Computer Co., Ltd.
    Inventors: Hisatoshi Mori, Syunichi Sato, Naohiro Konya
  • Patent number: 5243202
    Abstract: A thin-film transistor comprises a gate electrode formed on a glass substrate, a gate insulating film formed essentially over an entire surface of the substrate to cover the gate electrode, a non-single-crystal silicon semiconductor film placed on the gate insulating film to cover the gate electrode; and a drain electrode and a source electrode spaced a specified distance apart on the semiconductor film and electrically connected to the semiconductor film so as to form the channel region of the transistor. The gate electrode is made of titanium-containing aluminum.
    Type: Grant
    Filed: January 12, 1993
    Date of Patent: September 7, 1993
    Assignee: Casio Computer Co., Ltd.
    Inventors: Hisatoshi Mori, Syunichi Sato, Naohiro Konya, Ichiro Ohno, Hiromitsu Ishii, Kunihiro Matsuda
  • Patent number: 5196912
    Abstract: A memory element is formed of a thin film transistor. The thin film transistor has a semiconductor layer, a source electrode electrically connected to the semiconductor layer, a drain electrode electrically connected to the semiconductor layer and formed separately from the source electrode, a gate electrode for controlling formation of a channel of the semiconductor layer, and a gate insulation film for isolating the gate electrode and the semiconductor layer from each other and causing a hysteresis in the relation between the drain current and the gate circuit. The insulation film is a silicon nitride film whose composition ratio of silicon to nitrogen is in a range of approx. 0.85 to 1.1. According to this invention, the relation between the gate voltage and the drain current can be set to have a hysteresis. Therefore, the thin film transistor can be used as a memory element.
    Type: Grant
    Filed: March 13, 1991
    Date of Patent: March 23, 1993
    Assignee: Casio Computer Co., Ltd.
    Inventors: Hiroshi Matsumoto, Hiroyasu Yamada, Nobuyuki Yamamura, Shinichi Shimomaki, Naohiro Konya, Kyuya Baba