Abstract: An inductance element includes: a first conductor formed into a rectangle spiral shape; and a second conductor formed into a rectangle spiral shape corresponding to the first conductor and provided to correspond to the first conductor element via a dielectric layer, wherein a first inner peripheral end of the first conductor and a second inner peripheral end of the second conductor are connected electrically in vicinity of a corner portion of a rectangle shape that the first conductor and the second conductor constitute.

Abstract: A capacitor built-in interposer of the present invention, includes a base resin layer, a capacitor first electrode provided to pass through the base resin layer and having projection portions projected from both surface sides of the base resin layer respectively whereby the projection portion on one surface side of the base resin layer serves as a connection portion, a capacitor dielectric layer for covering the projection portion of the first electrode on other surface side of the base resin layer, and a capacitor second electrode for covering the dielectric layer, wherein a plurality of capacitors each constructed by the first electrode, the dielectric layer, and the second electrode are arranged and aligned in a lateral direction in a state that the capacitors are passed through the base resin layer.

Abstract: It is characterized in that in the case of filling a through hole formed in a substrate with a plated metal by electrolytic plating, the electrolytic plating is started by a high current density higher than Constant Current Density capable of fully filling the through hole when the electrolytic plating is performed with a current density held constant as a current density of the electrolytic plating, and the electrolytic plating is continued by being changed to a current density lower than the high current density by the time of reaching formation of a seam diameter in which an inside diameter does not decrease even when the electrolytic plating is continued after the electrolytic plating at the high current density is started.

Abstract: There is provided a electronic parts packaging structure that includes a mounted body on which an electronic parts is mounted, the electronic parts having a connection pad, which has an etching stopper film (a copper film, a gold film, a silver film, or a conductive past film) as an uppermost film, and mounted on the mounted body to direct the connection pad upward, an interlayer insulating film for covering the electronic parts, a via hole formed in the insulating film on the connection pad of the electronic parts, and a wiring pattern connected to the connection pad via the via hole.

Abstract: A process for manufacturing a wiring board comprising a substrate made of an insulation material and having first and second surfaces, first and second conductor patterns formed on the first and second surfaces, respectively, and a via conductor penetrating the substrate to electrically connect the first conductor pattern with the second conductor pattern; the process comprising the following steps of: forming the substrate with a through-hole penetrating thereto and defining openings at the first and second surfaces, respectively; plating the substrate with a metal so that a metal layer having a predetermined thickness is formed on the respective first and second surfaces of the substrate and the through-hole is substantially filled with the metal to be the via conductor; irradiating a laser beam, as a plurality of spots, around a metal-less portion of the plated metal, such as a dimple or seam, at positions corresponding to the openings of the through-hole, so that the a part of the plated metal melts to fi

Abstract: A method of production of a circuit board able to prevent peeling of a conductive layer during polishing of the conductive layer including the steps of forming at least holes in one surface of a substrate; forming a plating power supply layer on the one surface of the substrate, the other surface, the sides, and inner surfaces of the holes; forming a metal layer formed on the one surface of the substrate, the other surface, and the sides and burying the holes by electroplating through the plating power supply layer; and polishing the metal layer to form interconnect patterns comprised of the metal layer buried in the holes.

Abstract: A wiring substrate including a predetermined wiring pattern, an electronic parts connection terminal on an element forming surface of which is flip-chip connected to the wiring pattern, an insulating film for covering the electronic parts, a via hole formed in a predetermined portion of the electronic parts and the insulating film on the connection terminal, and an overlying wiring pattern formed on the insulating film and connected to the connection terminal via the via hole.

Abstract: There is provided a electronic parts packaging structure that includes a mounted body on which an electronic parts is mounted, the electronic parts having a connection pad, which has an etching stopper film (a copper film, a gold film, a silver film, or a conductive past film) as an uppermost film, and mounted on the mounted body to direct the connection pad upward, an interlayer insulating film for covering the electronic parts, a via hole formed in the insulating film on the connection pad of the electronic parts, and a wiring pattern connected to the connection pad via the via hole.

Abstract: There are included a wiring substrate including a predetermined wiring pattern, an electronic parts connection terminal on an element forming surface of which is flip-chip connected to the wiring pattern, an insulating film for covering the electronic parts, a via hole formed in a predetermined portion of the electronic parts and the insulating film on the connection terminal, and an overlying wiring pattern formed on the insulating film and connected to the connection terminal via the via hole.

Abstract: A plasma treatment is performed on the surface of one side of a polyimide film made of a resin. When wettability is imparted to the surface of the one side of the polyimide film, the plasma treatment is performed on the surface of the one side of the polyimide film to which sprayed water adhere.

Abstract: A method of manufacturing a micro-semiconductor element comprising the following steps of: adhering a semiconductor wafer 10 having a circuit surface and a back surface to a support plate 20 via a protective film 22 so that the circuit surface faces to the protective film; reducing a thickness of the semiconductor wafer while the semiconductor wafer is supported by the support plate; dividing the semiconductor wafer into individual semiconductor elements 10a while the semiconductor wafer is adhered to the protective film; moving the semiconductor elements from the protective film to an adhesive peeling film 26 in such a manner that the back surfaces of the semiconductor elements are adhered to the peeling film; supporting a periphery of the peeling film by a support ring 28; and picking up the individual semiconductor element by a pickup device when the back surface of semiconductor element is pushed up, via the peeling film, by a pushup pin 30.

Abstract: A process for manufacturing a wiring board comprising a substrate made of an insulation material and having first and second surfaces, first and second conductor patterns formed on the first and second surfaces, respectively, and a via conductor penetrating the substrate to electrically connect the first conductor pattern with the second conductor pattern; the process comprising the following steps of: forming the substrate with a through-hole penetrating thereto and defining openings at the first and second surfaces, respectively; plating the substrate with a metal so that a metal layer having a predetermined thickness is formed on the respective first and second surfaces of the substrate and the through-hole is substantially filled with the metal to be the via conductor; irradiating a laser beam, as a plurality of spots, around a metal-less portion of the plated metal, such as a dimple or seam, at positions corresponding to the openings of the through-hole, so that the a part of the plated metal melts to fi

Abstract: The through-holes 2 in the silicon substrate 1 are plugged with the metal 8 by means of electrolytic plating. After both faces of the silicon substrate are polished and smoothed, high pressure annealing is conducted on the silicon substrate so as to remove minute voids generated in the plugged metal and, therefore, the preciseness and density of the plugged metal is enhanced.

Abstract: There are included a wiring substrate including a predetermined wiring pattern, an electronic parts connection terminal on an element forming surface of which is flip-chip connected to the wiring pattern, an insulating film for covering the electronic parts, a via hole formed in a predetermined portion of the electronic parts and the insulating film on the connection terminal, and an overlying wiring pattern formed on the insulating film and connected to the connection terminal via the via hole.

Abstract: There is provided a electronic parts packaging structure that includes a mounted body on which an electronic parts is mounted, the electronic parts having a connection pad, which has an etching stopper film (a copper film, a gold film, a silver film, or a conductive past film) as an uppermost film, and mounted on the mounted body to direct the connection pad upward, an interlayer insulating film for covering the electronic parts, a via hole formed in the insulating film on the connection pad of the electronic parts, and a wiring pattern connected to the connection pad via the via hole.

Abstract: There are included a wiring substrate including a predetermined wiring pattern, an electronic parts connection terminal on an element forming surface of which is flip-chip connected to the wiring pattern, an insulating film for covering the electronic parts, a via hole formed in a predetermined portion of the electronic parts and the insulating film on the connection terminal, and an overlying wiring pattern formed on the insulating film and connected to the connection terminal via the via hole.

Abstract: A semiconductor device, enabling reliable electrical connection of a main electrode pad with an interconnection pattern without separate provision of a via use electrode pad in addition to the existing main electrode pad, provided with a silicon substrate (semiconductor substrate), an electronic element formation layer formed on one surface of that silicon substrate, an electrode pad having an extension and electrically connected to the electronic element formation layer, a through hole passing through the electrode pad and the silicon substrate, an SiO2 film (insulating film), a via hole provided in the SiO2 film on the extension of the electrode pad, and an interconnection pattern electrically leading out the electrode pad to the other surface of the silicon substrate through the through hole and via hole, said through hole having a diameter larger at a portion passing through the electrode pad than a portion passing through the semiconductor substrate.

Abstract: A semiconductor device, enabling reliable electrical connection of a main electrode pad with an interconnection pattern without separate provision of a via use electrode pad in addition to the existing main electrode pad, provided with a silicon substrate (semiconductor substrate), an electronic element formation layer formed on one surface of that silicon substrate, an electrode pad electrically connected to the electronic element formation layer, a through hole passing through the electrode pad and the silicon substrate, an SiO2 film (insulating film), a via hole provided in the SiO2 film on the electrode pad along the opening rim of the through hole, and an interconnection pattern electrically leading out the electrode pad to the other surface of the silicon substrate through the through hole and via hole.

Abstract: A method of forming a through-hole or a recess in a silicon substrate, having a conductor pattern formed on one side thereof by irradiating a laser beam to the silicon substrate, comprising the steps of: forming a protective film for protecting the conductor pattern on the one side of the silicon substrate, forming, on the entire surface of the silicon substrate inclusive of the top of the protective film, a metal plating film adhered to the protective film, irradiating a laser beam onto a predetermined position of the silicon substrate covered with the protective film and with the metal plating film, to form a through-hole or a recess in the silicon substrate, peeling off the metal plating film and removing debris, on the metal plating film around the open periphery of the through-hole or the recess, which has been deposited thereon during the formation of the thorough-hole or the recess by the laser beam irradiation, and removing a deposit, on the inner wall of the thorough-hole or the recess, which has bee

Abstract: The through-holes 2 in the silicon substrate 1 are plugged with the metal 8 by means of electrolytic plating. After both faces of the silicon substrate are polished and smoothed, high pressure annealing is conducted on the silicon substrate so as to remove minute voids generated in the plugged metal and, therefore, the preciseness and density of the plugged metal is enhanced.