Abstract: A semiconductor chip is mounted on a semiconductor chip carrier through a flip chip bonding technique; the semiconductor chip carrier includes an insulating layer such as synthetic resin having a mounting area assigned to the semiconductor chip and a conductive pattern having pads bonded to bumps of the semiconductor chip, and only the pads are formed in the mounting area so that melted synthetic resin smoothly flows into the gaps between the insulating synthetic resin layer and the semiconductor chip.

Abstract: In a semiconductor package stack module, an LSI (Large Scale Integrated circuit) is mounted, via fine bumps, on a ceramic carrier substrate or a flexible carrier film on which wiring conductors are formed. After a seal resin has been injected, the chip is thinned by, e.g., grinding. A plurality of such carrier substrates or carrier films are connected to each other by bumps via through holes which are electrically connected to the wiring conductors, thereby completing a tridimensional stack module. The module achieves a miniature, thin, dense, low cost, and reliable structure without resorting to a wire bonding system or a TAB (Tape Automated Bonding) system. In addition, the module has a minimum of wiring length and a desirable electric characteristic.

Abstract: A probe card comprises the following elements. An insulation film is provided which is flexible and extends on a first surface of a substrate. The insulation film has a first surface in contact with the first surface of the substrate, to form a space region which is defined between the first surface of the substrate and the first surface of the insulation film so as to allow part of the insulation film to move into the space. Probe patterns extend on a second surface of the insulation film so that the probe patterns.

Abstract: A solder ball arrangement device has a thin arrangement plate having a plurality of through-holes of a truncated pyramid shape, a porous member bonded to the arrangement plate, and a housing member for receiving the arrangement plate and the porous member for defining an air space inside the housing member. A suction pump is provided to evacuate the air space and to receive an array of solder balls in the through-holes by suction. The through-holes are formed by etching, and the porous member reinforces the thin arrangement plate.

Abstract: A fabrication method of a plastic-molded lead component is provided, in which leads are aligned at a fine pitch of approximately 100 .mu.m or less with a high accuracy, a simplified process sequence, and a low cost. First, a template having opened V-grooves is prepared. The V-grooves extend along a straight line and are aligned in parallel at a fixed pitch. Second, wire pieces are placed in the respective grooves of the template. Third, the placed pieces of the wire pieces are aligned in parallel on the template at a same pitch as that of the grooves. Fourth, a molding compound is supplied onto the template with or without the use of a mold to bury the aligned wire pieces placed in the grooves. Fifth, the molding compound supplied onto the template is cured to form an encapsulation plastic on the template. The wire pieces placed in the grooves are encapsulated by the encapsulation plastic in such a way that both ends of the wire pieces are exposed from opposite sides of the encapsulation plastic.

Abstract: A method for arranging metallic balls to form an array of bump electrodes comprises the steps of immersing a silicon template in ethanol dropping metallic balls through the ethanol onto the template to receive the metallic balls in the holes of the template. The metallic balls are free from cohesion caused by electrostatic charge or moisture. The template may be inclined in the ethanol. The holes are formed by anisotropic etching a silicon plate.

Abstract: A three-dimensional memory module includes a plurality of semiconductor device units, every adjacent two of which are stack-connected via through-holes by a bump connecting method. Each of the plurality of semiconductor device units includes a carrier having a circuit pattern and the through-holes connected to the circuit pattern. The semiconductor device unit also includes at least one semiconductor memory chip mounted on the carrier such that the semiconductor memory chip is connected to the circuit pattern, and at least one chip select semiconductor chip mounted on the carrier to be connected to the circuit pattern such that the chip select semiconductor chip can select the semiconductor memory chip.

Abstract: An IC package includes an IC chip substrate having a first surface on which a plurality of electrodes are formed, and an organic substrate having a first surface on which a plurality of bump electrodes are provided. The organic substrate is combined with the IC chip substrate. Each of the bump electrodes is in contact with a corresponding one of the electrodes on the IC chip substrate. The organic substrate has a plurality of through holes and metallization patterns electrically connecting each of the bump electrodes to a corresponding one of the through holes.

Abstract: A stack module is provided which relieves thermal stress generated in a heat-radiating element and provides improved cooling efficiency. Connection bumps of a plurality of mounting substrates, onto which are mounted semiconductor chips are used to stack the substrates to four levels, three wave-shaped heat-radiating elements, made of copper, being in thermal contact between the semiconductor chips of three of the mounting substrates and the rear surfaces of three of the mounting substrates, making use of the spring elasticity of the heat-radiating elements to establish this thermal contact.

Abstract: The invention provides a semiconductor device including a semiconductor substrate formed thereon with at least one recessed portion, an electrically conductive layer covering at least a surface of the recessed portion therewith, and a ball-bump formed on the electrically conductive layer within the recessed portion. The semiconductor device can act as a probe card by additionally having a tester device formed in the semiconductor substrate and provided with a function of testing electrical performances of a semiconductor device. Since the recessed portion can be formed by lithography technique, it is possible to arrange the greater number of pins in a smaller pitch, and in addition, it is also possible to locate ball-bumps in place with higher accuracy than a conventional semiconductor device.

Abstract: A sealing structure for bumps on a semiconductor integrated circuit chip to be bonded through the bumps onto a circuit board is provided wherein a plurality of pads are formed on the semiconductor integrated circuit chip. Each of the pads is formed with a bump thereon. A coating material is provided to coat at least surfaces of the above a plurality of bumps. The material is made of an insulation material having a hardness sufficiently small for showing, when bonding the chip onto the circuit board, a deformation thereby at least a top portion of each of the bumps is made contact with pads provided on the circuit board.

Abstract: To perform a stable wire bonding connecting against a multi-level wiring board using an organic material for the interlayer insulating film, a silicon oxide film and organic interlayer insulating films, for example, polyimide layers, and the first to the fourth level wirings, including a nickel layer by plating are formed on the surface of the silicon substrate as a base in order. By adjusting the thickness of the nickel layer in the wiring, the total Vickers hardness from the substrate to each wiring is adjusted to more than 100, respectively.