Patents by Inventor Naoki Ando
Naoki Ando has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20080007504Abstract: Disclosed herein is a liquid crystal display apparatus, including, a pixel array section, a first data line, a second data line, a writing unit, a voltage supply control unit, a data line short-circuiting unit, a reading out unit, and a testing unit.Type: ApplicationFiled: June 12, 2007Publication date: January 10, 2008Inventors: Hideaki Kawaura, Kazutoshi Shimizume, Naoki Ando, Kazuyuki Miyazawa, Katsuhisa Hirano, Noriaki Horiguchi, Osamu Akimoto
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Publication number: 20070236244Abstract: The present invention allows an efficient test as to the presence of line defects in data lines and gate lines in a liquid crystal display. A logic circuit for a test is provided according to the interconnect layout structure on a semiconductor substrate of a liquid crystal display, and ends of data lines are coupled to inputs of the logic circuit. At the time of the test, test drive signals corresponding to a certain logical value are applied to the data lines, and a determination is made as to defects in the data lines based on the output from the logic circuit, obtained in response to the signal application. This way means that determinations can be made as to defects in the data lines based on a logical value as the output from the logic circuit, i.e., binary values. Such a configuration is also applied to gate lines.Type: ApplicationFiled: June 1, 2007Publication date: October 11, 2007Applicant: Sony CorporationInventor: Naoki Ando
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Patent number: 7145358Abstract: The test circuit of a display apparatus according to the invention detect short-circuiting in each of the data lines Dn by inputting the electric potential Vd of the data line Dn connected to the corresponding one of high resistance first short-circuiting detecting resistors Trln connecting a predetermined electric potential and the data line Dn to the corresponding one of first detector logic circuits and binarizing and outputting the input electric potential Vd of the data line Dn by referring to a predetermined threshold value and also detect short-circuiting in each of the gate lines Gm by inputting the electric potential of the gate line Gm connected to the corresponding one of high resistance second short-circuiting detecting resistors connecting a predetermined electric potential and the gate line Gm to the corresponding one of second detector logic circuits and binarizing and outputting the input electric potential of the gate line by referring to a predetermined threshold value.Type: GrantFiled: May 25, 2005Date of Patent: December 5, 2006Assignee: Sony CorporationInventor: Naoki Ando
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Publication number: 20060257624Abstract: A composite characterized by comprising an aluminum alloy shaped item having a surface roughness of 5 to 50 ?m or more, the surface provided with 1 ?m or less fine depressions or protrusions, and a thermoplastic resin composition composed mainly of a polyphenylene sulfide or polybutylene terephthalate resin whose average of lengthwise and crosswise linear expansion coefficients is in the range of 2 to 4×10?5° C.?1, the thermoplastic resin composition penetrating and anchored in the depressions or protrusions. The thermoplastic resin composition is not easily detached from the aluminum alloy shaped item. Thus, in, for example, electronic equipments and household electrical appliances, the advantage of metallic cage body can be reconciled with the advantage of synthetic resin structure. This composite can ensure high production efficiency and is suitable for mass production. Further, morphology and structure designing thereof can be accomplished freely.Type: ApplicationFiled: November 7, 2003Publication date: November 16, 2006Inventors: Masanori Naritomi, Naoki Ando
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Patent number: 7123044Abstract: A method for testing a semiconductor substrate forming a liquid crystal display device, which method enables a potential change corresponding to a defective condition of pixel cell driving circuits to be detected accurately even when a ratio of pixel capacitance to wiring capacitance is lowered with decrease in size or increase in definition of the liquid crystal display device. The method includes: a charge retaining step for making pixel capacitances connected to a plurality of pixel switches selected from all pixel switches connected to one data line retain charge; and a detecting step for simultaneously detecting the charge retained in a plurality of the pixel capacitances in the charge retaining step from the one data line.Type: GrantFiled: May 6, 2005Date of Patent: October 17, 2006Assignee: Sony CorporationInventors: Toshihiko Orii, Osamu Akimoto, Hitoshi Abe, Naoki Ando
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Publication number: 20060226866Abstract: The test circuit of a display apparatus according to the invention detect short-circuiting in each of the data lines Dn by inputting the electric potential Vd of the data line Dn connected to the corresponding one of high resistance first short-circuiting detecting resistors Tr1n connecting a predetermined electric potential and the data line Dn to the corresponding one of first detector logic circuits and binarizing and outputting the input electric potential Vd of the data line Dn by referring to a predetermined threshold value and also detect short-circuiting in each of the gate lines Gm by inputting the electric potential of the gate line Gm connected to the corresponding one of high resistance second short-circuiting detecting resistors connecting a predetermined electric potential and the gate line Gm to the corresponding one of second detector logic circuits and binarizing and outputting the input electric potential of the gate line by referring to a predetermined threshold value.Type: ApplicationFiled: June 21, 2006Publication date: October 12, 2006Inventor: Naoki Ando
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Publication number: 20060192752Abstract: The present invention allows an efficient test as to the presence of line defects in data lines and gate lines in a liquid crystal display. A logic circuit for a test is provided according to the interconnect layout structure on a semiconductor substrate of a liquid crystal display, and ends of data lines are coupled to inputs of the logic circuit. At the time of the test, test drive signals corresponding to a certain logical value are applied to the data lines, and a determination is made as to defects in the data lines based on the output from the logic circuit, obtained in response to the signal application. This way means that determinations can be made as to defects in the data lines based on a logical value as the output from the logic circuit, i.e., binary values. Such a configuration is also applied to gate lines.Type: ApplicationFiled: July 16, 2004Publication date: August 31, 2006Applicant: Sony CorporationInventor: Naoki Ando
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Publication number: 20060127684Abstract: The present invention allows both the advantages of a metallic housing and those of a synthetic resin structure to be exhibited in electronic devices, home electrical devices, etc., and achieves high productivity and mass productivity and further enables a desired configuration and structure to be designed freely. As a pretreatment, a shaped aluminum alloy material is dipped in an aqueous solution of at least one selected from the group consisting of ammonia, hydrazine, and a water-soluble amine compound. A thermoplastic resin composition containing polyphenylene sulfide as a component is integrally bonded to the surface of the treated shaped aluminum alloy material by injection molding or other method. The molded article is a product made of the shaped aluminum alloy material and the thermoplastic resin composition containing PPS. Thus, the characteristic features of metal can be utilized in terms of mechanical strength and external appearance design.Type: ApplicationFiled: November 7, 2003Publication date: June 15, 2006Inventors: Masanori Naritomi, Naoki Ando, Masao Takahashi
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Patent number: 7009418Abstract: A method for testing a semiconductor substrate forming a liquid crystal display device, which method enables a potential change corresponding to a defective condition of pixel cell driving circuits to be detected accurately even when a ratio of pixel capacitance to wiring capacitance is lowered with decrease in size or increase in definition of the liquid crystal display device. The method includes: a charge retaining step for making pixel capacitances connected to a plurality of pixel switches selected from all pixel switches connected to one data line retain charge; and a detecting step for simultaneously detecting the charge retained in a plurality of the pixel capacitances in the charge retaining step from the one data line.Type: GrantFiled: August 2, 2002Date of Patent: March 7, 2006Assignee: Sony CorporationInventors: Toshihiko Orii, Osamu Akimoto, Hitoshi Abe, Naoki Ando
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Publication number: 20050270059Abstract: The test circuit of a display apparatus according to the invention detect short-circuiting in each of the data lines Dn by inputting the electric potential Vd of the data line Dn connected to the corresponding one of high resistance first short-circuiting detecting resistors Trln connecting a predetermined electric potential and the data line Dn to the corresponding one of first detector logic circuits and binarizing and outputting the input electric potential Vd of the data line Dn by referring to a predetermined threshold value and also detect short-circuiting in each of the gate lines Gm by inputting the electric potential of the gate line Gm connected to the corresponding one of high resistance second short-circuiting detecting resistors connecting a predetermined electric potential and the gate line Gm to the corresponding one of second detector logic circuits and binarizing and outputting the input electric potential of the gate line by referring to a predetermined threshold value.Type: ApplicationFiled: May 25, 2005Publication date: December 8, 2005Inventor: Naoki Ando
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Patent number: 6963012Abstract: The present invention provides diaryl ether derivatives that exhibit significant immunosuppressive effects with less side effects. The diaryl derivatives of the present invention are represented by the following general formula (1): one example is 2-amino-2-[4-(3-benzyloxyphenoxy)-2-chlorophenyl]propyl-1,3-propanediol.Type: GrantFiled: September 25, 2002Date of Patent: November 8, 2005Assignee: Kyorin Pharmaceutical Co., Ltd.Inventors: Yasushi Kohno, Naoki Ando, Takahiro Tanase, Kazuhiko Kuriyama, Satoru Iwanami, Shinji Kudou
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Patent number: 6960692Abstract: The present invention provides diaryl sulfide derivatives that exhibit significant immunosuppressive effects with less side effects. The diaryl derivatives of the present invention are represented by the following general formula (1): One example is 2-amino-2-[4-(3-benzyloxyphenylthio)-2-chlorophenyl]propyl-1,3-propanediol.Type: GrantFiled: September 25, 2002Date of Patent: November 1, 2005Assignee: Kyorin Pharmaceutical Co., Ltd.Inventors: Yasushi Kohno, Naoki Ando, Kazuhiko Kuriyama, Satoru Iwanami, Shinji Kudou
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Publication number: 20050200377Abstract: A method for testing a semiconductor substrate forming a liquid crystal display device, which method enables a potential change corresponding to a defective condition of pixel cell driving circuits to be detected accurately even when a ratio of pixel capacitance to wiring capacitance is lowered with decrease in size or increase in definition of the liquid crystal display device. The method includes: a charge retaining step for making pixel capacitances connected to a plurality of pixel switches selected from all pixel switches connected to one data line retain charge; and a detecting step for simultaneously detecting the charge retained in a plurality of the pixel capacitances in the charge retaining step from the one data line.Type: ApplicationFiled: May 6, 2005Publication date: September 15, 2005Inventors: Toshihiko Orii, Osamu Akimoto, Hitoshi Abe, Naoki Ando
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Publication number: 20040254222Abstract: The present invention provides diaryl sulfide derivatives that exhibit significant immunosuppressive effects with less side effects.Type: ApplicationFiled: March 17, 2004Publication date: December 16, 2004Inventors: Yasushi Kohno, Naoki Ando, Kazuhiko Kuriyama, Satoru Iwanami, Shinji Kudou
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Publication number: 20040242654Abstract: The present invention provides diaryl ether derivatives that exhibit significant immunosuppressive effects with less side effects.Type: ApplicationFiled: March 22, 2004Publication date: December 2, 2004Inventors: Yasushi Kohno, Naoki Ando, Takahiro Tanase, Kazuhiko Kuriyama, Satoru Iwanami, Shinji Kudou
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Patent number: 6771907Abstract: An optical ring system having: a wavelength demultiplexer to which wavelength-multiplexed optical signal to be sent through an optical fiber from a previous node of multiple nodes is input and in which optical signal with each wavelength assigned to itself is demultiplexed; an optical ring device which is disposed in a predetermined node of the multiple nodes to the each wavelength assigned and which is composed of a failure existence judging part which terminates an overhead of each optical signal with a wavelength demultiplexed by the wavelength demultiplexer and judges whether a failure occurs in regard to a wavelength in a previous section through which optical signal with the assigned wavelength is sent, and a switching part which, when the failure existence judging means determines the occurrence of failure, selects a path that allows optical signal with the wavelength to be transmitted to the previous node while avoiding the previous section incurring the failure; and a wavelength multiplexer which mulType: GrantFiled: May 24, 2000Date of Patent: August 3, 2004Assignee: NEC CorporationInventors: Yuuki Yoshifuji, Shuichi Iida, Takashi Yamazaki, Youko Nakabayashi, Shinya Nakamura, Kimio Ozawa, Naoki Ando, Hitoshi Kikuchi, Tukasa Haga, Hiromitu Watanabe, Minoru Shinta, Hitoshi Takeshita, Shinobu Sasaki, Ryou Yamada, Naoya Henmi
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Publication number: 20040062943Abstract: The present invention allows both the merits of a metallic housing and those of a synthetic resin structure to be exhibited in electronic devices, domestic electric devices, etc., and achieves high productivity and mass production capability as well as enables a desired configuration and structure to be designed freely. The present invention is useful for achieving a reduction in weight and for attaining increased strength in not only electronic devices and domestic electric devices but also various parts and structures.Type: ApplicationFiled: July 16, 2003Publication date: April 1, 2004Inventors: Masanori Naritomi, Naoki Ando, Masao Takahashi, Masao Shiraishi
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Publication number: 20040032278Abstract: A method for testing a semiconductor substrate forming a liquid crystal display device, which method enables a potential change corresponding to a defective condition of pixel cell driving circuits to be detected accurately even when a ratio of pixel capacitance to wiring capacitance is lowered with decrease in size or increase in definition of the liquid crystal display device. The method includes: a charge retaining step for making pixel capacitances connected to a plurality of pixel switches selected from all pixel switches connected to one data line retain charge; and a detecting step for simultaneously detecting the charge retained in a plurality of the pixel capacitances in the charge retaining step from the one data line.Type: ApplicationFiled: July 7, 2003Publication date: February 19, 2004Inventors: Toshihiko Orii, Osamu Akimoto, Hitoshi Abe, Naoki Ando
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Patent number: 6526020Abstract: In a ring network system employing the transoceanic function, the path switching time in the protection process is made shorter. From the path setting information, the determination process corresponding to the fault positions is created at the start-up time and path update time, and saved in the memory unit 23. This allows the switching information for faults to be uniquely determined, and the determination process portion increased by the transoceanic function can almost be eliminated. The switching time remains unchanged as compared with the conventional protection.Type: GrantFiled: March 4, 1999Date of Patent: February 25, 2003Assignee: NEC CorporationInventor: Naoki Ando
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Patent number: 6359860Abstract: According to a connection switching method of a switch for selectively setting a connection path between a plurality of input lines and a plurality of output lines, the types of faults which may occur on the input lines are defined. Connection destination information indicating connection states of the switch are stored in accordance with the types of faults. The type of fault is specified on the basis of the defined types of faults when a fault occurs on an input line. Connection destination information corresponding to the specified type of fault is read out. The connection state of the switch is switched on the basis of the readout connection destination information. A connection switching apparatus is also disclosed.Type: GrantFiled: June 16, 1998Date of Patent: March 19, 2002Assignee: NEC CorporationInventor: Naoki Ando