Patents by Inventor Naoki Kanazawa
Naoki Kanazawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240131836Abstract: A metal wire includes tungsten or a tungsten alloy. The metal wire has a diameter of at most 13 ?m, a tensile strength of at least 4.8 GPa, and a natural hanging length per 1000 mm of at least 800 mm.Type: ApplicationFiled: December 21, 2021Publication date: April 25, 2024Applicant: Panasonic Intellectual Property Management Co., Ltd.Inventors: Tomohiro KANAZAWA, Kazuhiro DAIJO, Kenshi TSUJI, Naoki KOHYAMA, Yui NAKAI
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Patent number: 11945177Abstract: A first laminated body is worked to form a second laminated body, the first laminated body being formed by laminating prepregs including reinforcing fibers and resin, the second laminated body including a flat portion and a wavy portion, the flat portion being located at at least one of side edge portions of the second laminated body, the wavy portion being located at a portion adjacent to the side edge portion and extending along a longitudinal direction. An intermediate product is formed from the second laminated body by a forming die such that the flat portion becomes a bent portion that is an inside portion whose circumferential length is shorter in a curved portion, and the wavy portion becomes a bent portion that is an outside portion whose circumferential length is longer in the curved portion.Type: GrantFiled: June 14, 2022Date of Patent: April 2, 2024Assignee: KAWASAKI JUKOGYO KABUSHIKI KAISHAInventors: Naoki Shimada, Yoshihiro Nakayama, Sayaka Ochi, Shouhei Kanazawa, Kenshirou Okumura, Takaya Hamamoto, Kentaro Tanaka, Yuya Ouchi
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Patent number: 11924985Abstract: A display device includes a display panel that includes a first hole and a device housing that is configured such that the display panel is fastened and fixed to the device housing by a screw passed through the first hole and screwed into the screw hole. The display panel includes a display-side positioning part which is configured to fit to a portion of the device housing to perform positioning of the display panel with respect to the device housing and which includes the first hole, and the device housing includes a housing-side positioning part which is configured to fit to the display-side positioning part to perform the positioning and which includes a second hole formed so as to communicate with the first hole when the housing-side positioning part is fitted to the display-side positioning part.Type: GrantFiled: October 6, 2022Date of Patent: March 5, 2024Assignee: YAZAKI CORPORATIONInventors: Junichi Ikumi, Masaaki Sano, Naoki Ueno, Akira Masuda, Takahiro Shimada, Takeshi Iwamoto, Shota Kosuga, Ryuta Suzuki, Satoru Kanazawa, Junnosuke Nishimura
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Publication number: 20230315516Abstract: Techniques for enhanced calibration and performance of quantum computers are presented. A monitoring job component can execute monitoring jobs on a quantum computer. A modeler component can determine respective quantum computer system state parameter values at a given time based on parameter values at respective time instances, the parameter values determined from output data generated by the quantum computer in response to execution of the monitoring jobs. A calibration agent can determine a calibration strategy relating to ordering of performance of calibration tasks to calibrate at least one parameter associated with the quantum computer based on the quantum computer system state parameter values.Type: ApplicationFiled: April 1, 2022Publication date: October 5, 2023Inventors: Mattias Fitzpatrick, Haggai Landa, Naoki Kanazawa, James John Raftery
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Patent number: 11704455Abstract: Techniques are provided for improving quantum computing devices. The technology can facilitate generating a sequence of sparse matrices representing a quantum computing device and a noise model. A system can comprise a memory that can store computer executable components and a processor that can execute the computer executable components stored in the memory. The computer executable components can include a term identifier that can identify a plurality of time-dependent terms in a machine-parseable representation of a quantum computing device. The computer executable components can further include a sparse matrix generator that can generate a first sparse matrix for ones of the plurality of time-dependent terms, resulting in a plurality of first sparse matrices.Type: GrantFiled: June 10, 2019Date of Patent: July 18, 2023Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Paul Nation, Naoki Kanazawa, Thomas Arab Alexander
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Patent number: 11687818Abstract: Techniques facilitating hardware-efficient calibration protocols for quantum computing devices. In one example, a system can comprise a process that executes computer executable components stored in memory. The computer executable components can comprise an echo pattern component and a pulse component. The echo pattern component can generate an echo sequence based on a Pauli term. The echo sequence can amplify the Pauli term. The pulse component can generate a pulse sequence to calibrate a multi-qubit gate using the echo sequence.Type: GrantFiled: February 5, 2021Date of Patent: June 27, 2023Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Naoki Kanazawa, Kentaro Heya
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Publication number: 20230197147Abstract: Systems and techniques that facilitate TLS-based optimization of Stark tone tuning are provided. In various embodiments, a system can comprise a receiver component that can access a qubit topology. In various aspects, the system can further comprise an optimization component that can identify, based on a set of two-level-system, (TLS) frequency regions of the qubit topology, one or more Stark tone frequencies. In various instances, the system can further comprise an execution component that can apply, to a qubit lattice corresponding to the qubit topology, one or more Stark tones that have the one or more Stark tone frequencies, thereby eliminating frequency collisions in the qubit lattice.Type: ApplicationFiled: December 17, 2021Publication date: June 22, 2023Inventors: Takashi Imamichi, Naoki Kanazawa, Sami Rosenblatt, Benjamin Fearon
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Patent number: 11681908Abstract: A quantum state classifier includes a reservoir computing circuit for post-processing a quantum bit to obtain a readout signal, and a readout circuit, coupled to the reservoir computing circuit, for discriminating a quantum state of the quantum bit from the readout signal from among multiple possible quantum states. The readout circuit is trained in a calibration process respectively activated by a specific one of each of the multiple quantum states such that weights within the linear readout circuit are updated by minibatch learning for each of multiple measurement sequences of the calibration process. The readout circuit generates a binary output after the multiple measurement sequences in a post-calibration classification process for a test quantum bit. The quantum state classifier further includes a controller, coupled to the readout circuit, selectively triggerable to output a control pulse responsive to the quantum state of the test quantum bit indicated by the binary output.Type: GrantFiled: September 13, 2019Date of Patent: June 20, 2023Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventor: Naoki Kanazawa
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Publication number: 20230180630Abstract: A vertical transmon qubit structure, includes a substrate having a first surface and a second surface. A through-silicon-via (TSV) is located in the substrate. A first electrode of a Josephson junction (JJ) is located on a portion of the first surface of the substrate and adjacent to the TSV. A second electrode of the JJ is in contact with the TSV and on a second portion of the first surface of the substrate. The first electrode is separated from the second electrode by an insulator.Type: ApplicationFiled: December 8, 2021Publication date: June 8, 2023Inventors: Masao Tokunari, Naoki Kanazawa, Akihiro Horibe, Kuniaki Sueoka
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Publication number: 20220253737Abstract: Techniques facilitating hardware-efficient calibration protocols for quantum computing devices. In one example, a system can comprise a process that executes computer executable components stored in memory. The computer executable components can comprise an echo pattern component and a pulse component. The echo pattern component can generate an echo sequence based on a Pauli term. The echo sequence can amplify the Pauli term. The pulse component can generate a pulse sequence to calibrate a multi-qubit gate using the echo sequence.Type: ApplicationFiled: February 5, 2021Publication date: August 11, 2022Inventors: Naoki Kanazawa, Kentaro Heya
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Publication number: 20220188182Abstract: Embodiments are provided for error mitigation in quantum programs. In some embodiments, a system can include a processor that executes computer-executable components stored in memory. The computer-executable components can include a noise assessment component that identifies a noise condition of a qubit device based on a noise property of quantum hardware configured to operate on the qubit device. The qubit device is represented in a quantum program executable on the noisy quantum hardware. The computer-executable components also can include a compilation component that modifies the quantum program by inserting a defined sequence of error-mitigating operations into the quantum program based on the noise condition.Type: ApplicationFiled: December 16, 2020Publication date: June 16, 2022Inventors: Lauren Capelluto, Daniel Josef Egger, Naoki Kanazawa, Manning Chuor
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Patent number: 11295198Abstract: To realize a reservoir computing system in which the reservoir is configured to be suitable for various learning targets, provided is a self-organizing reservoir computing system, including an input layer that outputs an input layer signal corresponding to input data; a reservoir layer that includes therein a nonlinear signal path using physical resonance phenomena and is operable to output an inherent reservoir layer signal in response to the input layer signal; and an output layer that outputs output data corresponding to the reservoir layer signal. Also provided is a self-organizing method.Type: GrantFiled: October 26, 2017Date of Patent: April 5, 2022Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventor: Naoki Kanazawa
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Patent number: 11294831Abstract: A method is performed to compile input data including a plurality of pulse sequences, hardware parameters obtained from a computing device, and a mathematical model with time-dependent control parameters to decrease a computation time of the input data. The method also includes providing the input data to the computing device to allow the computing device to run a computation of the input data. The method further includes converting the pulse sequences into memory-aligned arrays to decrease the computation time of the input data. The method includes calculating optimized output data using an adaptive step size computation to decrease the computation time needed to compute the output data.Type: GrantFiled: December 21, 2020Date of Patent: April 5, 2022Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Paul Nation, Naoki Kanazawa
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Publication number: 20210109871Abstract: A method is performed to compile input data including a plurality of pulse sequences, hardware parameters obtained from a computing device, and a mathematical model with time-dependent control parameters to decrease a computation time of the input data. The method also includes providing the input data to the computing device to allow the computing device to run a computation of the input data. The method further includes converting the pulse sequences into memory-aligned arrays to decrease the computation time of the input data. The method includes calculating optimized output data using an adaptive step size computation to decrease the computation time needed to compute the output data.Type: ApplicationFiled: December 21, 2020Publication date: April 15, 2021Applicant: International Business Machines CorporationInventors: Paul Nation, Naoki Kanazawa
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Patent number: 10970234Abstract: A method is performed to compile input data including a plurality of pulse sequences, hardware parameters obtained from a computing device, and a mathematical model with time-dependent control parameters to decrease a computation time of the input data. The method also includes providing the input data to the computing device to allow the computing device to run a computation of the input data. The method further includes converting the pulse sequences into memory-aligned arrays to decrease the computation time of the input data. The method includes calculating optimized output data using an adaptive step size computation to decrease the computation time needed to compute the output data.Type: GrantFiled: July 16, 2019Date of Patent: April 6, 2021Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Paul Nation, Naoki Kanazawa
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Publication number: 20210081779Abstract: A quantum state classifier includes a reservoir computing circuit for post-processing a quantum bit to obtain a readout signal, and a readout circuit, coupled to the reservoir computing circuit, for discriminating a quantum state of the quantum bit from the readout signal from among multiple possible quantum states. The readout circuit is trained in a calibration process respectively activated by a specific one of each of the multiple quantum states such that weights within the linear readout circuit are updated by minibatch learning for each of multiple measurement sequences of the calibration process. The readout circuit generates a binary output after the multiple measurement sequences in a post-calibration classification process for a test quantum bit. The quantum state classifier further includes a controller, coupled to the readout circuit, selectively triggerable to output a control pulse responsive to the quantum state of the test quantum bit indicated by the binary output.Type: ApplicationFiled: September 13, 2019Publication date: March 18, 2021Inventor: Naoki Kanazawa
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Publication number: 20210019269Abstract: A method is performed to compile input data including a plurality of pulse sequences, hardware parameters obtained from a computing device, and a mathematical model with time-dependent control parameters to decrease a computation time of the input data. The method also includes providing the input data to the computing device to allow the computing device to run a computation of the input data. The method further includes converting the pulse sequences into memory-aligned arrays to decrease the computation time of the input data. The method includes calculating optimized output data using an adaptive step size computation to decrease the computation time needed to compute the output data.Type: ApplicationFiled: July 16, 2019Publication date: January 21, 2021Applicant: International Business Machines CorporationInventors: Paul Nation, Naoki Kanazawa
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Publication number: 20200387578Abstract: Techniques are provided for improving quantum computing devices. The technology can facilitate generating a sequence of sparse matrices representing a quantum computing device and a noise model. A system can comprise a memory that can store computer executable components and a processor that can execute the computer executable components stored in the memory. The computer executable components can include a term identifier that can identify a plurality of time-dependent terms in a machine-parseable representation of a quantum computing device. The computer executable components can further include a sparse matrix generator that can generate a first sparse matrix for ones of the plurality of time-dependent terms, resulting in a plurality of first sparse matrices.Type: ApplicationFiled: June 10, 2019Publication date: December 10, 2020Inventors: Paul Nation, Naoki Kanazawa, Thomas Arab Alexander
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Patent number: 10840428Abstract: Quantum computing devices include a chip carrier that has a conductive carrier body and one or more readout resonators in the conductive carrier body. Each readout resonator has a center conductor and a coaxial dielectric layer. A quantum chip is on the chip carrier and includes one or more qubits positioned over respective readout resonators.Type: GrantFiled: March 7, 2019Date of Patent: November 17, 2020Assignee: International Business Machines CorporationInventors: Naoki Kanazawa, Masao Tokunari
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Patent number: 10790912Abstract: Systems, computer-implemented methods, and computer program products to facilitate visualizing arbitrary pulse shapes and schedules in quantum computing applications are provided. According to an embodiment, a system can a processor that can execute computer executable components stored in memory. The system can further comprise a collection component that can receive a pulse schedule of pulse data and control parameters of a quantum device comprising default pulse data of the quantum device. The system can further comprise a plotting component that can generate a plot of the pulse schedule based on the pulse data, the control parameters, and the default pulse data. The system can further comprise a visualization component that can generate a display of the pulse schedule.Type: GrantFiled: December 4, 2019Date of Patent: September 29, 2020Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Paul Nation, Naoki Kanazawa, Thomas Arab Alexander