Patents by Inventor Naoki Mukaida

Naoki Mukaida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11256432
    Abstract: A memory controller capable of preventing important data stored in a flash memory from being lost and maintaining the quality of a physical block. A memory controller for controlling access to a flash memory including a plurality of physical blocks, each of which includes a plurality of pages, based on a command assigned from a host system. The memory controller stores a first correspondence relationship between a logical block of a first logical region and a physical block of a first physical region in a first storage unit. The memory controller manages the first physical region in which a process of moving data saved in the physical block of the first physical region having the correspondence relationship with the logical block of the first logical region is prohibited without being based on a command for writing the data to the first logical region assigned from the host system.
    Type: Grant
    Filed: September 18, 2019
    Date of Patent: February 22, 2022
    Assignee: TDK CORPORATION
    Inventors: Naoki Mukaida, Kenichi Takubo
  • Patent number: 11249895
    Abstract: A memory controller for preventing the storage area of a flash memory being reduced is provided. The memory controller controlling access to a flash memory based on a command provided from a host system, the memory controller includes: a processor, a RAM (random access memory), and a mask ROM (read only memory) in which a first firmware is written, wherein the memory controller is configured to: perform a search for a second firmware written in the flash memory based on the first firmware at a start-up time; and write a third firmware provided from the host system in the RAM when the second firmware is not found through the search and perform an initialization based on the third firmware written in the RAM.
    Type: Grant
    Filed: September 3, 2019
    Date of Patent: February 15, 2022
    Assignee: TDK CORPORATION
    Inventors: Naoki Mukaida, Kenichi Takubo
  • Patent number: 11029885
    Abstract: A memory controller controls access to a flash memory including a plurality of physical blocks, each of which includes a plurality of pages, based on a command assigned from a host system. The memory controller allocates a physical block within the flash memory in a prescribed search range as a prescribed physical block where management information is written, writes the management information necessary for accessing the flash memory to the prescribed physical block, and operates to search for the prescribed physical block when second firmware is read from the flash memory. The writing information, including the management information, is written to the prescribed physical block in a same format regardless of a type of flash memory. Information written to pages is sequentially read at prescribed page intervals in the prescribed search range in searching for the prescribed physical block.
    Type: Grant
    Filed: September 19, 2019
    Date of Patent: June 8, 2021
    Assignee: TDK CORPORATION
    Inventors: Naoki Mukaida, Kenichi Takubo
  • Publication number: 20200159456
    Abstract: To improve the versatility of a memory controller for controlling a plurality of types of flash memories.
    Type: Application
    Filed: September 19, 2019
    Publication date: May 21, 2020
    Applicant: TDK CORPORATION
    Inventors: Naoki MUKAIDA, Kenichi TAKUBO
  • Publication number: 20200159411
    Abstract: A memory controller capable of preventing important data stored in a flash memory from being lost and maintaining the quality of a physical block. A memory controller for controlling access to a flash memory including a plurality of physical blocks, each of which includes a plurality of pages, based on a command assigned from a host system. The memory controller stores a first correspondence relationship between a logical block of a first logical region and a physical block of a first physical region in a first storage unit. The memory controller manages the first physical region in which a process of moving data saved in the physical block of the first physical region having the correspondence relationship with the logical block of the first logical region is prohibited without being based on a command for writing the data to the first logical region assigned from the host system.
    Type: Application
    Filed: September 18, 2019
    Publication date: May 21, 2020
    Applicant: TDK CORPORATION
    Inventors: Naoki MUKAIDA, Kenichi TAKUBO
  • Publication number: 20200133837
    Abstract: A memory controller for preventing the storage area of a flash memory being reduced is provided. The memory controller controlling access to a flash memory based on a command provided from a host system, the memory controller includes: a processor, a RAM (random access memory), and a mask ROM (read only memory) in which a first firmware is written, wherein the memory controller is configured to: perform a search for a second firmware written in the flash memory based on the first firmware at a start-up time; and write a third firmware provided from the host system in the RAM when the second firmware is not found through the search and perform an initialization based on the third firmware written in the RAM.
    Type: Application
    Filed: September 3, 2019
    Publication date: April 30, 2020
    Applicant: TDK CORPORATION
    Inventors: Naoki MUKAIDA, Kenichi TAKUBO
  • Patent number: 8316208
    Abstract: The object of the present invention is to efficiently perform access to a physical block corresponding to a logical block often designated by an access request. To realize it, predetermined number of pieces of logical block information each for access to a physical block corresponding to logical block, until then, designated by an access request is held. In holding the predetermined pieces of logical block information, a piece of logical block information having high priority precede a piece of logical block information having low priority in priority order. In management of the priority order, priority of a piece of logical block information corresponding to a logical block often designated by an access request becomes high. When an access request is received, if logical block information corresponding to the logical block designated by the access request is held, access to the physical block corresponding to the designated logical block is performed based on the held logical block information.
    Type: Grant
    Filed: June 22, 2010
    Date of Patent: November 20, 2012
    Assignee: TDK Corporation
    Inventor: Naoki Mukaida
  • Patent number: 8239612
    Abstract: The memory controller updates a count number based on a new assignment of a logical block to a physical block, and writes count information in the physical block to which the logical block is newly assigned. The count information is defined by the count number. The memory controller decides, based on the count number and the count information stored in each physical block, whether or not to transfer stored data in a physical block to another physical block.
    Type: Grant
    Filed: September 26, 2008
    Date of Patent: August 7, 2012
    Assignee: TDK Corporation
    Inventors: Naoki Mukaida, Takashi Takahashi
  • Patent number: 8200892
    Abstract: In the control of the number of program-erase cycles, when assigning a logical block (LB) to a physical block (PB), the number of program-erase cycles of a first PB and that of a second PB are compared, which first PB is a free PB of which the number of program-erase cycles is the smallest among that of free PBs, which second PB is a PB earliest assigned a LB among PBs each assigned a LB. As a result, in a case where the number of program-erase cycles of the first PB is larger by a predetermined value or more than that of the second PB, data stored in the second PB are transferred to a free PB of which the number of program-erase cycles is the largest among free PBs, and then the LB is assigned to the second PB.
    Type: Grant
    Filed: February 8, 2010
    Date of Patent: June 12, 2012
    Assignee: TDK Corporation
    Inventor: Naoki Mukaida
  • Patent number: 8200891
    Abstract: In the control of the number of program-erase cycles, physical blocks (PBs) are divided into plural groups on a basis of the number of program-erase cycles and a search for a free PB is performed in the groups when assigning a logical block (LB) to the free PB. In the search, a free PB among a group covering a small number of program-erase cycles precedes that among a group covering a large number of program-erase cycles. Further, when searching out a free PB in the search, data stored in a PB (source PB) included in a group covering a smaller number of program-erase cycles than that covered by a group including the free PB searched out are transferred to the free PB if there is the source PB. The source PB is a PB to which a LB is assigned earliest among a group including it.
    Type: Grant
    Filed: February 8, 2010
    Date of Patent: June 12, 2012
    Assignee: TDK Corporation
    Inventors: Naoki Mukaida, Takeshi Kamono
  • Patent number: 8176236
    Abstract: Access to flash memories is controlled so that efficiency of data writing and effective utilization of storage area go together. In the access control, priority order, for physical blocks each storing effective data, is managed so that a position of a physical block in the assignment order becomes higher according as assignment of a logical block to the physical block is performed more recently. When assigning a logical block to a free physical block, a determination is made whether a position of a previous physical block is higher than a predetermined position in the priority order. The previous physical block is a physical block, then, corresponding to the same logical block as the free physical block. When the determination is negative, effective data stored in the previous physical block is transferred to the free physical block.
    Type: Grant
    Filed: February 18, 2010
    Date of Patent: May 8, 2012
    Assignee: TDK Corporation
    Inventor: Naoki Mukaida
  • Publication number: 20110283052
    Abstract: The object of the present invention is to efficiently perform access to a physical block corresponding to a logical block often designated by an access request. To realize it, predetermined number of pieces of logical block information each for access to a physical block corresponding to logical block, until then, designated by an access request is held. In holding the predetermined pieces of logical block information, a piece of logical block information having high priority precede a piece of logical block information having low priority in priority order. In management of the priority order, priority of a piece of logical block information corresponding to a logical block often designated by an access request becomes high. When an access request is received, if logical block information corresponding to the logical block designated by the access request is held, access to the physical block corresponding to the designated logical block is performed based on the held logical block information.
    Type: Application
    Filed: June 22, 2010
    Publication date: November 17, 2011
    Applicant: TDK CORPORATION
    Inventor: Naoki MUKAIDA
  • Patent number: 7877562
    Abstract: A flash memory stores a boot program of a host system and its backup program. A memory controller determines whether or not the boot program is stored properly in the flash memory when the host system is to be activated. The memory controller reads out the boot program in a case where the boot program is stored properly, and reads out the backup program in a case where the boot program is not stored properly. Then, the memory controller supplies the read-out boot program or backup program to the host system. This makes it possible to avoid a situation that the host system cannot be activated due to the boot program not being able to be executed.
    Type: Grant
    Filed: June 13, 2006
    Date of Patent: January 25, 2011
    Assignee: TDK Corporation
    Inventor: Naoki Mukaida
  • Publication number: 20100211723
    Abstract: Access to flash memories is controlled so that efficiency of data writing and effective utilization of storage area go together. In the access control, priority order, for physical blocks each storing effective data, is managed so that a position of a physical block in the assignment order becomes higher according as assignment of a logical block to the physical block is performed more recently. When assigning a logical block to a free physical block, a determination is made whether a position of a previous physical block is higher than a predetermined position in the priority order. The previous physical block is a physical block, then, corresponding to the same logical block as the free physical block. When the determination is negative, effective data stored in the previous physical block is transferred to the free physical block.
    Type: Application
    Filed: February 18, 2010
    Publication date: August 19, 2010
    Applicant: TDK Corporation
    Inventor: Naoki Mukaida
  • Publication number: 20100205357
    Abstract: In the control of the number of program-erase cycles, when assigning a logical block (LB) to a physical block (PB), the number of program-erase cycles of a first PB and that of a second PB are compared, which first PB is a free PB of which the number of program-erase cycles is the smallest among that of free PBs, which second PB is a PB earliest assigned a LB among PBs each assigned a LB. As a result, in a case where the number of program-erase cycles of the first PB is larger by a predetermined value or more than that of the second PB, data stored in the second PB are transferred to a free PB of which the number of program-erase cycles is the largest among free PBs, and then the LB is assigned to the second PB.
    Type: Application
    Filed: February 8, 2010
    Publication date: August 12, 2010
    Applicant: TDK CORPORATION
    Inventor: Naoki MUKAIDA
  • Publication number: 20100205356
    Abstract: In the control of the number of program-erase cycles, physical blocks (PBs) are divided into plural groups on a basis of the number of program-erase cycles and a search for a free PB is performed in the groups when assigning a logical block (LB) to the free PB. In the search, a free PB among a group covering a small number of program-erase cycles precedes that among a group covering a large number of program-erase cycles. Further, when searching out a free PB in the search, data stored in a PB (source PB) included in a group covering a smaller number of program-erase cycles than that covered by a group including the free PB searched out are transferred to the free PB if there is the source PB. The source PB is a PB to which a LB is assigned earliest among a group including it.
    Type: Application
    Filed: February 8, 2010
    Publication date: August 12, 2010
    Applicant: TDK CORPORATION
    Inventors: Naoki MUKAIDA, Takeshi KAMONO
  • Patent number: 7685356
    Abstract: Chronological identification information is composed of a plurality of cyclic numbers with priorities. For generating new chronological identification information, the chronological relation is compared in order from cyclic numbers with the highest priority to extract the newest chronological identification information in the chronological relation; when the newest chronological identification information in the chronological relation is extracted, a cyclic number with a priority as a comparison target in the extraction of the extracted chronological identification information is determined to be a cyclic number with the priority in the newly generated chronological identification information.
    Type: Grant
    Filed: May 22, 2007
    Date of Patent: March 23, 2010
    Assignee: TDK Corporation
    Inventor: Naoki Mukaida
  • Patent number: 7617352
    Abstract: A memory controller includes decision means responsive to a request to write user data issued by a host computer for determining whether progressive data writing for writing user data to a target page designated by a host address is possible, and write means responsive to an affirmative determination by the decision means for writing user data to the target page without performing an inter-block data transfer. Thus, a series of data write operations for completing data writing can be performed at high speed because the frequency of inter-block data transfers is low.
    Type: Grant
    Filed: December 26, 2001
    Date of Patent: November 10, 2009
    Assignee: TDK Corporation
    Inventors: Naoki Mukaida, Kenzo Kita, Yukio Terasaki
  • Publication number: 20090089489
    Abstract: The memory controller updates a count number based on a new assignment of a logical block to a physical block, and writes count information in the physical block to which the logical block is newly assigned. The count information is defined by the count number. The memory controller decides, based on the count number and the count information stored in each physical block, whether or not to transfer stored data in a physical block to another physical block.
    Type: Application
    Filed: September 26, 2008
    Publication date: April 2, 2009
    Applicant: TDK CORPORATION
    Inventors: Naoki MUKAIDA, Takashi TAKAHASHI
  • Patent number: 7315870
    Abstract: There is disclosed a controller included in a flash memory system attachable to a memory interface of a host system. If a block in which new data is written and a block in which old data is written are present simultaneously, the controller determines in which block the newest data is written, based on version identifier stored in a redundant area of a flash memory. Specifically, the controller has an access control function for controlling access to the flash memory, an address managing function for managing correspondence between a logical block address supplied from the host system and a physical block address in the flash memory, a version identifier setting function for writing version identifier in the redundant area of the flash memory, and a version identifying function for identifying a block in which newest data corresponding to a same logical block address is written based on the version identifier.
    Type: Grant
    Filed: December 27, 2004
    Date of Patent: January 1, 2008
    Assignee: TDK Corporation
    Inventor: Naoki Mukaida