Patents by Inventor Naoki Yoshimochi

Naoki Yoshimochi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120102082
    Abstract: Disclosed herein is a reception apparatus, including a first equalization section, a second equalization section, and an arithmetic operation section. The first equalization section is adapted to carry out equalization of a signal which represents data transmitted by a transmission method which uses a single carrier. The second equalization section is adapted to carry out equalization of a signal which represents data transmitted by a transmission method which uses multi carriers. The arithmetic operation section is adapted to carry out arithmetic operation for determining information to be used for the equalization by the first equalization section and arithmetic operation for determining information to be used for the equalization by the second equalization section.
    Type: Application
    Filed: September 23, 2011
    Publication date: April 26, 2012
    Applicant: SONY CORPORATION
    Inventors: Naoki YOSHIMOCHI, Katsumi Takaoka, Hidetoshi Kawauchi
  • Publication number: 20120099677
    Abstract: A signal receiving apparatus includes: a processing unit configured to carry out Fourier transform on Fourier-transform data serving as a Fourier-transform object and carry out Fourier transform on inverse-Fourier-transform data serving as an inverse-Fourier-transform object; and a control unit configured to output pieces of data obtained as a result of the Fourier transform carried out on the Fourier-transform data in an order, in which the pieces of data have been obtained, in a process of outputting the pieces of data and output other pieces of data obtained as a result of the Fourier transform carried out on the inverse-Fourier transform data by rearranging the other pieces of data in a process of outputting the other pieces of data.
    Type: Application
    Filed: September 19, 2011
    Publication date: April 26, 2012
    Applicant: Sony Corporation
    Inventors: Ryoji IKEGAYA, Hidetoshi Kawauchi, Suguru Houchi, Naoki Yoshimochi
  • Publication number: 20120099681
    Abstract: A reception apparatus is disclosed which includes: a detection section configured to detect the presence or absence of spectrum inversion in data transmitted by a multi-carrier transmission system based on whether a known signal can be decoded using that part of the transmitted data which has been transmitted by carriers used for transmitting the known signal; and a correction section configured to correct the data transmitted by the multi-carrier transmission system if the presence of spectrum inversion is detected.
    Type: Application
    Filed: September 19, 2011
    Publication date: April 26, 2012
    Applicant: Sony Corporation
    Inventors: Naoki YOSHIMOCHI, Hidetoshi Kawauchi, Kazukuni Takanohashi
  • Patent number: 8139664
    Abstract: Disclosed herein is a reception apparatus, including, an orthogonal frequency division multiplexing signal reception section, a first filter section, a subtraction section, a second filter section, a coefficient production section, and a Fast Fourier Transformation mathematic operation section.
    Type: Grant
    Filed: November 26, 2008
    Date of Patent: March 20, 2012
    Assignee: Sony Corporation
    Inventors: Hidetoshi Kawauchi, Takashi Yokokawa, Takashi Horiguti, Naoki Yoshimochi, Hiroyuki Kamata, Ryoji Ikegaya, Yasuhiro Iida
  • Patent number: 8107519
    Abstract: An equalizer includes: a replica generation means for generating a replica of a multipath component by applying an adaptive filter to a received signal; a removal means for generating a multipath-component removed signal from which the multipath component has been removed by subtracting the replica from the received signal; a correlation value calculation means for calculating a correlation value between the received signal and the replica; a power value calculation means for calculating a power value of the replica; a determination means for determining whether the replica is the replica of the multipath component based on the correlation value and the power value; and a selection means for outputting the multipath-component removed signal when it is determined that the replica is the replica of the multipath component, and outputting the received signal when it is determined that the replica is not the replica of the multipath component.
    Type: Grant
    Filed: September 18, 2009
    Date of Patent: January 31, 2012
    Assignee: Sony Corporation
    Inventors: Hidetoshi Kawauchi, Naoki Yoshimochi, Ryoji Ikegaya
  • Patent number: 8098775
    Abstract: A data processing apparatus includes: a branch-metric computation section configured to compute a branch metric; a state-metric computation section configured to compute a state metric; a detection section configured to detect a minimum state metric; a storage section configured to store states as surviving states; and a selection section configured to select a candidate.
    Type: Grant
    Filed: March 13, 2009
    Date of Patent: January 17, 2012
    Assignee: Sony Corporation
    Inventors: Takashi Yokokawa, Naoki Yoshimochi, Toshiyuki Miyauchi, Takashi Horiguti, Satoru Hori
  • Publication number: 20110246863
    Abstract: The present invention relates to data processing apparatus and method, and a program which make it possible to scatter burst errors with respect to both codes of a product code. A block-wise interleaver performs interleaving A, which is a process of inputting data in the order of the column direction as one direction, and reading the data in the order of the direction diagonally downward to the right, NB bits by NB bits (=block by block) with respect to ND×NB×NA bits of a product code. Next, the block-wise interleaver performs interleaving B, which is a process of inputting data in the order of the column direction as one direction, and reading the data in the order of the row direction as the other direction, NB bits by NB bits with respect to (NC?ND)×NB×NA bits representing the parity portion of an inner code indicated by P, of the product code. The present invention can be applied to, for example, a recording/reproducing apparatus.
    Type: Application
    Filed: October 27, 2009
    Publication date: October 6, 2011
    Inventors: Toshiyuki Miyauchi, Naoki Yoshimochi
  • Patent number: 7986615
    Abstract: A demodulating circuit including: an FFT processing section; an intercarrier interferential component removing section; an extracting section; a transmission path characteristics estimating section; an interpolating section; a symbol sequence estimating section; and an interference replica generating section.
    Type: Grant
    Filed: March 13, 2009
    Date of Patent: July 26, 2011
    Assignee: Sony Corporation
    Inventors: Hidetoshi Kawauchi, Toshiyuki Miyauchi, Takashi Yokokawa, Takashi Horiguti, Naoki Yoshimochi, Yasuhiro Iida, Satoru Hori
  • Publication number: 20110099453
    Abstract: A receiving apparatus includes: a first decoding means for performing, every time frame data in which an inner code and an outer code are used as error correction codes is transmitted thereto, decoding processing employing the inner code and outputting decoded data; a storing means for storing the decoded data; a second decoding means for applying decoding processing employing the outer code to the decoded data; and a control means for controlling storage and output of the decoded data in and from the storing means to suspend, while the control means causes the storing means to output first decoded data as the decoded data of a decoding result of first frame data to the second decoding means, when the first decoding means starts output of second decoded data as the decoded data of a decoding result of second frame data following the first frame data, the output of the first decoded data to the second decoding means and cause the storing means to store the second decoded data and, when the storage of the secon
    Type: Application
    Filed: September 22, 2010
    Publication date: April 28, 2011
    Applicant: Sony Corporation
    Inventors: Osamu SHINYA, Takashi Yokokawa, Naoki Yoshimochi
  • Publication number: 20100310013
    Abstract: A signal receiving apparatus includes: an acquisition section configured to acquire an Orthogonal Frequency Division Multiplexing signal resulting from combination of a plurality of signals transmitted by a plurality of signal transmitting apparatus by adoption of an Orthogonal Frequency Division Multiplexing method; and a demodulation section configured to carry out partial processing of processing to demodulate the Orthogonal Frequency Division Multiplexing signal acquired by the acquisition section by making use of either first pilot signals or second pilot signals where the first pilot signals are pilot signals extracted from the Orthogonal Frequency Division Multiplexing signal acquired by the acquisition section as signals having the same phase for all the signal transmitting apparatus, and the second pilot signals are pilot signals extracted from the Orthogonal Frequency Division Multiplexing signal acquired by the acquisition section as signals having different phases depending on the signal transmitt
    Type: Application
    Filed: May 27, 2010
    Publication date: December 9, 2010
    Inventors: Suguru HOUCHI, Naoki Yoshimochi, Takuya Okamoto, Yuken Goto, Takashi Yokokawa
  • Publication number: 20100074318
    Abstract: An equalizer includes: a replica generation means for generating a replica of a multipath component by applying an adaptive filter to a received signal; a removal means for generating a multipath-component removed signal from which the multipath component has been removed by subtracting the replica from the received signal; a correlation value calculation means for calculating a correlation value between the received signal and the replica; a power value calculation means for calculating a power value of the replica; a determination means for determining whether the replica is the replica of the multipath component based on the correlation value and the power value; and a selection means for outputting the multipath-component removed signal when it is determined that the replica is the replica of the multipath component, and outputting the received signal when it is determined that the replica is not the replica of the multipath component.
    Type: Application
    Filed: September 18, 2009
    Publication date: March 25, 2010
    Inventors: Hidetoshi KAWAUCHI, Naoki Yoshimochi, Ryoji Ikegaya
  • Publication number: 20090231994
    Abstract: Disclosed herein is A demodulating circuit including: an FFT processing section; an intercarrier interferential component removing section; an extracting section; a transmission path characteristics estimating section; an interpolating section; a symbol sequence estimating section; and an interference replica generating section.
    Type: Application
    Filed: March 13, 2009
    Publication date: September 17, 2009
    Inventors: Hidetoshi KAWAUCHI, Toshiyuki MIYAUCHI, Takashi YOKOKAWA, Takashi HORIGUTI, Naoki YOSHIMOCHI, Yasuhiro IIDA, Satoru HORI
  • Publication number: 20090235060
    Abstract: A data processing apparatus includes: a branch-metric computation section configured to compute a branch metric; a state-metric computation section configured to compute a state metric; a detection section configured to detect a minimum state metric; a storage section configured to store states as surviving states; and a selection section configured to select a candidate.
    Type: Application
    Filed: March 13, 2009
    Publication date: September 17, 2009
    Inventors: Takashi Yokokawa, Naoki Yoshimochi, Toshiyuki Miyauchi, Takashi Horiguti, Satoru Hori
  • Publication number: 20090135931
    Abstract: Disclosed herein is a reception apparatus, including, an orthogonal frequency division multiplexing signal reception section, a first filter section, a subtraction section, a second filter section, a coefficient production section, and a Fast Fourier Transformation mathematic operation section.
    Type: Application
    Filed: November 26, 2008
    Publication date: May 28, 2009
    Inventors: Hidetoshi KAWAUCHI, Takashi YOKOKAWA, Takashi HORIGUTI, Naoki YOSHIMOCHI, Hiroyuki KAMATA, Ryoji IKEGAYA, Yasuhiro IIDA