Patents by Inventor Naomi Yamada
Naomi Yamada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240096195Abstract: The present invention provides a notification system (10) including: a customer status information generation unit (11) generating, based on an image in which the inside of a store is captured, customer status information indicating at least one of the number of customers waiting for checkout and the number of customers in the store; a checkout work region information generation unit (12) generating, based on an image in which the inside of the store is captured, checkout work region information indicating status of a checkout work region where a clerk performing checkout work is positioned; a determination unit (13) determining, based on the customer status information and the checkout work region information, whether to make notification of an assistance request for checkout work; and a notification unit (14) making notification of the assistance request through an output apparatus when notification of the assistance request is determined to be made.Type: ApplicationFiled: October 19, 2021Publication date: March 21, 2024Applicant: NEC CorporationInventors: Takahiro YAMADA, Naomi YAMASHITA
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Patent number: 9263670Abstract: A memory element and a memory device, the memory element including a first electrode, a memory layer, and a second electrode in this order. The memory layer includes a resistance change layer provided on the first electrode side, and an ion source layer provided on the second electrode side and is higher in resistance value than the resistance change layer. A resistance value of the resistance change layer is changeable in response to a composition change by applied voltage to the first and second electrodes.Type: GrantFiled: September 16, 2013Date of Patent: February 16, 2016Assignee: SONY CORPORATIONInventors: Shuichiro Yasuda, Hiroaki Sei, Akira Kouchiyama, Masayuki Shimuta, Naomi Yamada
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Patent number: 8873281Abstract: A memory element capable of simultaneously satisfying the number of repeating operation times and a low-voltage operation characteristic which are in a tradeoff relation is provided. The memory element has a high-resistivity layer and an ion source layer between a bottom electrode and a top electrode. The high-resistivity layer is made of an oxide containing Te. Any of elements other than Te such as Al, Zr, Ta, Hf, Si, Ge, Ni, Co, Cu, and Au may be added. In the case of adding Al to Te and also adding Cu and Zr, the composition ratio of the high-resistivity layer is preferably adjusted in the ranges of 30?Te?100 atomic %, 0?Al?70 atomic %, and 0?Cu+Zr?36 atomic % except for oxygen. The ion source layer is made of at least one kind of metal elements and at least one kind of chalcogen elements of Te, S, and Se.Type: GrantFiled: September 9, 2013Date of Patent: October 28, 2014Assignee: Sony CorporationInventors: Tetsuya Mizuguchi, Shuichiro Yasuda, Satoshi Sasaki, Naomi Yamada
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Patent number: 8685786Abstract: Disclosed herein is a semiconductor memory device, including: a first electrode formed on a substrate; an ion source layer formed on an upper layer of the first electrode; and a second electrode formed on an upper layer of the ion source layer. Resistance change type memory cells in each of which either a surface of the first electrode or a surface of the ion source layer is oxidized to form a resistance change type memory layer in an interface between the first electrode and the ion source interface are arranged in a array.Type: GrantFiled: May 24, 2013Date of Patent: April 1, 2014Assignee: Sony CorporationInventors: Yoshihisa Kagawa, Tetsuya Mizuguchi, Ichiro Fujiwara, Akira Kouchiyama, Satoshi Sasaki, Naomi Yamada
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Publication number: 20140021434Abstract: A memory element and a memory device, the memory element including a first electrode, a memory layer, and a second electrode in this order. The memory layer includes a resistance change layer provided on the first electrode side, and an ion source layer provided on the second electrode side and is higher in resistance value than the resistance change layer.Type: ApplicationFiled: September 16, 2013Publication date: January 23, 2014Applicant: SONY CORPORATIONInventors: Shuichiro Yasuda, Hiroaki Sei, Akira Kouchiyama, Masayuki Shimuta, Naomi Yamada
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Publication number: 20140008600Abstract: A memory element capable of simultaneously satisfying the number of repeating operation times and a low-voltage operation characteristic which are in a tradeoff relation is provided. The memory element has a high-resistivity layer and an ion source layer between a bottom electrode and a top electrode. The high-resistivity layer is made of an oxide containing Te. Any of elements other than Te such as Al, Zr, Ta, Hf, Si, Ge, Ni, Co, Cu, and Au may be added. In the case of adding Al to Te and also adding Cu and Zr, the composition ratio of the high-resistivity layer is preferably adjusted in the ranges of 30?Te?100 atomic %, 0?Al ?70 atomic %, and 0?Cu+Zr?36 atomic % except for oxygen. The ion source layer is made of at least one kind of metal elements and at least one kind of chalcogen elements of Te, S, and Se.Type: ApplicationFiled: September 9, 2013Publication date: January 9, 2014Applicant: Sony CorporationInventors: Tetsuya Mizuguchi, Shuichiro Yasuda, Satoshi Sasaki, Naomi Yamada
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Publication number: 20130256626Abstract: Disclosed herein is a semiconductor memory device, including: a first electrode formed on a substrate; an ion source layer formed on an upper layer of the first electrode; and a second electrode formed on an upper layer of the ion source layer. Resistance change type memory cells in each of which either a surface of the first electrode or a surface of the ion source layer is oxidized to form a resistance change type memory layer in an interface between the first electrode and the ion source interface are arranged in a array.Type: ApplicationFiled: May 24, 2013Publication date: October 3, 2013Inventors: Yoshihisa KAGAWA, Tetsuya MIZUGUCHI, Ichiro FUJIWARA, Akira KOUCHIYAMA, Satoshi SASAKI, Naomi YAMADA
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Patent number: 8546782Abstract: A memory element and a memory device with improved controllability over resistance change by applied voltage are provided. The memory element includes a first electrode, a memory layer, and a second electrode in this order. The memory layer includes a resistance change layer provided on the first electrode side, and an ion source layer provided on the second electrode side and is higher in resistance value than the resistance change layer. A resistance value of the resistance change layer is changeable in response to a composition change by applied voltage to the first and second electrodes.Type: GrantFiled: June 21, 2011Date of Patent: October 1, 2013Assignee: Sony CorporationInventors: Shuichiro Yasuda, Hiroaki Sei, Akira Kouchiyama, Masayuki Shimuta, Naomi Yamada
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Patent number: 8547735Abstract: A memory element capable of simultaneously satisfying the number of repeating operation times and a low-voltage operation characteristic which are in a tradeoff relation is provided. The memory element has a high-resistivity layer and an ion source layer between a bottom electrode and a top electrode. The high-resistivity layer is made of an oxide containing Te. Any of elements other than Te such as Al, Zr, Ta, Hf, Si, Ge, Ni, Co, Cu, and Au may be added. In the case of adding Al to Te and also adding Cu and Zr, the composition ratio of the high-resistivity layer is preferably adjusted in the ranges of 30?Te?100 atomic %, 0?Al?70 atomic %, and 0?Cu+Zr?36 atomic % except for oxygen. The ion source layer is made of at least one kind of metal elements and at least one kind of chalcogen elements of Te, S, and Se.Type: GrantFiled: August 28, 2009Date of Patent: October 1, 2013Assignee: Sony CorporationInventors: Tetsuya Mizuguchi, Shuichiro Yasuda, Satoshi Sasaki, Naomi Yamada
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Publication number: 20120008370Abstract: A memory element and a memory device with improved controllability over resistance change by applied voltage are provided. The memory element includes a first electrode, a memory layer, and a second electrode in this order. The memory layer includes a resistance change layer provided on the first electrode side, and an ion source layer provided on the second electrode side and is higher in resistance value than the resistance change layer.Type: ApplicationFiled: June 21, 2011Publication date: January 12, 2012Applicant: SONY CORPORATIONInventors: Shuichiro Yasuda, Hiroaki Sei, Akira Kouchiyama, Masayuki Shimuta, Naomi Yamada
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Publication number: 20110155987Abstract: A memory element capable of simultaneously satisfying the number of repeating operation times and a low-voltage operation characteristic which are in a tradeoff relation is provided. The memory element has a high-resistivity layer and an ion source layer between a bottom electrode and a top electrode. The high-resistivity layer is made of an oxide containing Te. Any of elements other than Te such as Al, Zr, Ta, Hf, Si, Ge, Ni, Co, Cu, and Au may be added. In the case of adding Al to Te and also adding Cu and Zr, the composition ratio of the high-resistivity layer is preferably adjusted in the ranges of 30?Te?100 atomic %, 0?Al?70 atomic %, and 0?Cu+Zr?36 atomic % except for oxygen. The ion source layer is made of at least one kind of metal elements and at least one kind of chalcogen elements of Te, S, and Se.Type: ApplicationFiled: August 28, 2009Publication date: June 30, 2011Applicant: SONY CORPORATIONInventors: Tetsuya Mizuguchi, Shuichiro Yasuda, Satoshi Sasaki, Naomi Yamada
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Publication number: 20110031466Abstract: Disclosed herein is a semiconductor memory device, including: a first electrode formed on a substrate; an ion source layer formed on an upper layer of the first electrode; and a second electrode formed on an upper layer of the ion source layer. Resistance change type memory cells in each of which either a surface of the first electrode or a surface of the ion source layer is oxidized to form a resistance change type memory layer in an interface between the first electrode and the ion source interface are arranged in a array.Type: ApplicationFiled: June 21, 2010Publication date: February 10, 2011Applicant: SONY CORPORATIONInventors: Yoshihisa KAGAWA, Tetsuya MIZUGUCHI, Ichiro FUJIWARA, Akira KOUCHIYAMA, Satoshi SASAKI, Naomi YAMADA
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Patent number: 7103909Abstract: An information processor equipped with a password storage for storing a password, which is inputted from outside for unlocking a password-locked condition of a storage device when booting the information processor. During a resume process, a controller unlocks the password-locked condition of the storage device using the password previously stored in the password storage. With this arrangement, when the information processor resumes its normal operating condition from a power saving mode, the operator does not need to input a password even if the information processor is installed in an unattended environment or a far remote local area.Type: GrantFiled: February 25, 1999Date of Patent: September 5, 2006Assignee: Fujitsu LimitedInventors: Hisaki Kondo, Shunichi Okano, Naomi Yamada