Patents by Inventor Naotaka Matsumoto

Naotaka Matsumoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10103679
    Abstract: An inverter unit includes a first temperature detector that detects a first temperature of at least one of semiconductor elements and a periphery of the semiconductor elements, current detectors that detect a current of a motor, and a controller that switches a modulation mode of the motor to a two-phase modulation mode or a three-phase modulation mode on the basis of a detection result of the first temperature by the first temperature detector and detection results of the current by the current detectors.
    Type: Grant
    Filed: December 19, 2016
    Date of Patent: October 16, 2018
    Assignee: KABUSHIKI KAISHA TOYOTA JIDOSHOKKI
    Inventors: Naohito Kanie, Kazuyoshi Kontani, Naotaka Matsumoto
  • Publication number: 20170187320
    Abstract: An inverter unit includes a first temperature detector that detects a first temperature of at least one of semiconductor elements and a periphery of the semiconductor elements, current detectors that detect a current of a motor, and a controller that switches a modulation mode of the motor to a two-phase modulation mode or a three-phase modulation mode on the basis of a detection result of the first temperature by the first temperature detector and detection results of the current by the current detectors.
    Type: Application
    Filed: December 19, 2016
    Publication date: June 29, 2017
    Applicant: KABUSHIKI KAISHA TOYOTA JIDOSHOKKI
    Inventors: Naohito KANIE, Kazuyoshi KONTANI, Naotaka MATSUMOTO
  • Patent number: 9496802
    Abstract: An inverter device includes a three-phase inverter, which has switching elements, and a controller, which is programmed to perform two-phase modulation control on switching of the switching elements between an ON state and an OFF state. The controller computes the power factor of a load. The controller determines whether or not the computed power factor is less than a preset threshold value. If the computed power factor is greater than or equal to the threshold value, the controller performs a phase shift to shift the central time point of an ON period or an OFF period for two phases other than a stop phase in the two-phase modulation control by 180 degrees, and if the computed power factor is less than the threshold value, the controller supplies the switching elements with ON and OFF control commands to perform the two-phase modulation control without performing the phase shift.
    Type: Grant
    Filed: November 20, 2013
    Date of Patent: November 15, 2016
    Assignee: KABUSHIKI KAISHA TOYOTA JIDOSHOKKI
    Inventor: Naotaka Matsumoto
  • Publication number: 20150311819
    Abstract: An inverter device includes a three-phase inverter, which has switching elements, and a controller, which is programmed to perform two-phase modulation control on switching of the switching elements between an ON state and an OFF state. The controller computes the power factor of a load. The controller determines whether or not the computed power factor is less than a preset threshold value. If the computed power factor is greater than or equal to the threshold value, the controller performs a phase shift to shift the central time point of an ON period or an OFF period for two phases other than a stop phase in the two-phase modulation control by 180 degrees, and if the computed power factor is less than the threshold value, the controller supplies the switching elements with ON and OFF control commands to perform the two-phase modulation control without performing the phase shift.
    Type: Application
    Filed: November 20, 2013
    Publication date: October 29, 2015
    Applicant: KABUSHIKI KAISHA TOYOTA JIDOSHOKKI
    Inventor: Naotaka MATSUMOTO
  • Patent number: 5091692
    Abstract: A probing test device is provided for contacting a plurality of probes with pads on a semiconductor wafer to be tested and supplying a test signal to a tester comprising a CPU for previously storing, as a reference image, the image signal obtained when the probes are correctly contacted with the electrode pads. The probing test device includes a mechanism for positioning these probes to be contacted with the pads on the wafer by moving the tested wafer relative to the probes, an optical system for image sensing those portions at which the probes are contacted with the pads, and a mechanism for positioning the optical system near to the pads by moving the optical system relative to the wafer. The CPU performs a comparison of the reference image signal with that image signal sensed for those portions at which the probes are contacted with the pads.
    Type: Grant
    Filed: December 31, 1990
    Date of Patent: February 25, 1992
    Assignee: Tokyo Electron Limited
    Inventors: Akira Ohno, Tetsuo Ohtsuka, Naotaka Matsumoto