Patents by Inventor Naoto Yamade

Naoto Yamade has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240154039
    Abstract: A semiconductor device includes a transistor including, a first to fifth insulator, a first to third oxide, a first to third conductor. An opening reaching the second oxide is provided in the fourth insulator and the fifth insulator. The third oxide, the third insulator, and the third conductor are arranged sequentially from the inner wall side of the opening so as to fill the opening. In the channel length direction of the transistor, at least part of the fourth insulator in a region where the fourth insulator and the second oxide do not overlap with each other is in contact with the first insulator. In the channel width direction of the transistor, at least part of the third oxide in a region where the third oxide and the second oxide do not overlap with each other is in contact with the first insulator.
    Type: Application
    Filed: January 4, 2024
    Publication date: May 9, 2024
    Inventors: Shunpei YAMAZAKI, Katsuaki TOCHIBAYASHI, Ryota HODO, Kentaro SUGAYA, Naoto YAMADE
  • Patent number: 11967649
    Abstract: The semiconductor device includes a first conductor and a second conductor; a first insulator to a third insulator; and a first oxide to a third oxide. The first conductor is disposed to be exposed from a top surface of the first insulator. The first oxide is disposed over the first insulator and the first conductor. A first opening reaching the first conductor is provided in the first oxide. The second oxide is disposed over the first oxide. The second oxide comprises a first region, a second region, and a third region positioned between the first region and the second region. The third oxide is disposed over the second oxide. The second insulator is disposed over the third oxide. The second conductor is disposed over the second insulator. The third insulator is disposed to cover the first region and the second region and to be in contact with the top surface of the first insulator.
    Type: Grant
    Filed: August 25, 2022
    Date of Patent: April 23, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Toshihiko Takeuchi, Naoto Yamade, Yutaka Okazaki, Sachiaki Tezuka, Shunpei Yamazaki
  • Publication number: 20240128380
    Abstract: A transistor with favorable electrical characteristics is provided. One embodiment of the present invention is a semiconductor device including a semiconductor, a first insulator in contact with the semiconductor, a first conductor in contact with the first insulator and overlapping with the semiconductor with the first insulator positioned between the semiconductor and the first conductor, and a second conductor and a third conductor, which are in contact with the semiconductor. One or more of the first to third conductors include a region containing tungsten and one or more elements selected from silicon, carbon, germanium, tin, aluminum, and nickel.
    Type: Application
    Filed: December 1, 2023
    Publication date: April 18, 2024
    Inventors: Yutaka OKAZAKI, Akihisa SHIMOMURA, Naoto YAMADE, Tomoya TAKESHITA, Tetsuhiro TANAKA
  • Patent number: 11955538
    Abstract: A semiconductor device that can be miniaturized or highly integrated is provided. The semiconductor device includes a first conductor, a second conductor over the first conductor, a first insulator covering the second conductor, a first oxide over the first insulator, and a second oxide over the first oxide, an opening overlapping with at least part of the first conductor is provided in the first oxide and the first insulator, and the second oxide is electrically connected to the first conductor through the opening.
    Type: Grant
    Filed: April 18, 2023
    Date of Patent: April 9, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Toshihiko Takeuchi, Naoto Yamade, Hiroshi Fujiki, Tomoaki Moriwaka, Shunsuke Kimura
  • Patent number: 11869979
    Abstract: A semiconductor device includes a transistor including, a first to fifth insulator, a first to third oxide, a first to third conductor. An opening reaching the second oxide is provided in the fourth insulator and the fifth insulator. The third oxide, the third insulator, and the third conductor are arranged sequentially from the inner wall side of the opening so as to fill the opening. In the channel length direction of the transistor, at least part of the fourth insulator in a region where the fourth insulator and the second oxide do not overlap with each other is in contact with the first insulator. In the channel width direction of the transistor, at least part of the third oxide in a region where the third oxide and the second oxide do not overlap with each other is in contact with the first insulator.
    Type: Grant
    Filed: April 22, 2022
    Date of Patent: January 9, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Katsuaki Tochibayashi, Ryota Hodo, Kentaro Sugaya, Naoto Yamade
  • Publication number: 20230299183
    Abstract: A semiconductor device that can be miniaturized or highly integrated is provided. The semiconductor device includes a first conductor, a second conductor over the first conductor, a first insulator covering the second conductor, a first oxide over the first insulator, and a second oxide over the first oxide, an opening overlapping with at least part of the first conductor is provided in the first oxide and the first insulator, and the second oxide is electrically connected to the first conductor through the opening.
    Type: Application
    Filed: April 18, 2023
    Publication date: September 21, 2023
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei YAMAZAKI, Toshihiko TAKEUCHI, Naoto YAMADE, Hiroshi FUJIKI, Tomoaki MORIWAKA, Shunsuke KIMURA
  • Patent number: 11670705
    Abstract: A semiconductor device that can be miniaturized or highly integrated is provided. The semiconductor device includes a first conductor, a second conductor over the first conductor, a first insulator covering the second conductor, a first oxide over the first insulator, and a second oxide over the first oxide, an opening overlapping with at least part of the first conductor is provided in the first oxide and the first insulator, and the second oxide is electrically connected to the first conductor through the opening.
    Type: Grant
    Filed: February 16, 2021
    Date of Patent: June 6, 2023
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Toshihiko Takeuchi, Naoto Yamade, Hiroshi Fujiki, Tomoaki Moriwaka, Shunsuke Kimura
  • Publication number: 20220416089
    Abstract: The semiconductor device includes a first conductor and a second conductor; a first insulator to a third insulator; and a first oxide to a third oxide. The first conductor is disposed to be exposed from a top surface of the first insulator. The first oxide is disposed over the first insulator and the first conductor. A first opening reaching the first conductor is provided in the first oxide. The second oxide is disposed over the first oxide. The second oxide comprises a first region, a second region, and a third region positioned between the first region and the second region. The third oxide is disposed over the second oxide. The second insulator is disposed over the third oxide. The second conductor is disposed over the second insulator. The third insulator is disposed to cover the first region and the second region and to be in contact with the top surface of the first insulator.
    Type: Application
    Filed: August 25, 2022
    Publication date: December 29, 2022
    Inventors: Toshihiko TAKEUCHI, Naoto YAMADE, Yutaka OKAZAKI, Sachiaki TEZUKA, Shunpei YAMAZAKI
  • Patent number: 11495691
    Abstract: The semiconductor device includes a first conductor and a second conductor; a first insulator to a third insulator; and a first oxide to a third oxide. The first conductor is disposed to be exposed from a top surface of the first insulator. The first oxide is disposed over the first insulator and the first conductor. A first opening reaching the first conductor is provided in the first oxide. The second oxide is disposed over the first oxide. The second oxide comprises a first region, a second region, and a third region positioned between the first region and the second region. The third oxide is disposed over the second oxide. The second insulator is disposed over the third oxide. The second conductor is disposed over the second insulator. The third insulator is disposed to cover the first region and the second region and to be in contact with the top surface of the first insulator.
    Type: Grant
    Filed: May 27, 2019
    Date of Patent: November 8, 2022
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Toshihiko Takeuchi, Naoto Yamade, Yutaka Okazaki, Sachiaki Tezuka, Shunpei Yamazaki
  • Publication number: 20220352387
    Abstract: A transistor with favorable electrical characteristics is provided. One embodiment of the present invention is a semiconductor device including a semiconductor, a first insulator in contact with the semiconductor, a first conductor in contact with the first insulator and overlapping with the semiconductor with the first insulator positioned between the semiconductor and the first conductor, and a second conductor and a third conductor, which are in contact with the semiconductor. One or more of the first to third conductors include a region containing tungsten and one or more elements selected from silicon, carbon, germanium, tin, aluminum, and nickel.
    Type: Application
    Filed: July 11, 2022
    Publication date: November 3, 2022
    Inventors: Yutaka OKAZAKI, Akihisa SHIMOMURA, Naoto YAMADE, Tomoya TAKESHITA, Tetsuhiro TANAKA
  • Publication number: 20220246765
    Abstract: A semiconductor device includes a transistor including, a first to fifth insulator, a first to third oxide, a first to third conductor. An opening reaching the second oxide is provided in the fourth insulator and the fifth insulator. The third oxide, the third insulator, and the third conductor are arranged sequentially from the inner wall side of the opening so as to fill the opening. In the channel length direction of the transistor, at least part of the fourth insulator in a region where the fourth insulator and the second oxide do not overlap with each other is in contact with the first insulator. In the channel width direction of the transistor, at least part of the third oxide in a region where the third oxide and the second oxide do not overlap with each other is in contact with the first insulator.
    Type: Application
    Filed: April 22, 2022
    Publication date: August 4, 2022
    Inventors: Shunpei YAMAZAKI, Katsuaki TOCHIBAYASHI, Ryota HODO, Kentaro SUGAYA, Naoto YAMADE
  • Patent number: 11393930
    Abstract: A transistor with favorable electrical characteristics is provided. One embodiment of the present invention is a semiconductor device including a semiconductor, a first insulator in contact with the semiconductor, a first conductor in contact with the first insulator and overlapping with the semiconductor with the first insulator positioned between the semiconductor and the first conductor, and a second conductor and a third conductor, which are in contact with the semiconductor. One or more of the first to third conductors include a region containing tungsten and one or more elements selected from silicon, carbon, germanium, tin, aluminum, and nickel.
    Type: Grant
    Filed: August 31, 2020
    Date of Patent: July 19, 2022
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yutaka Okazaki, Akihisa Shimomura, Naoto Yamade, Tomoya Takeshita, Tetsuhiro Tanaka
  • Publication number: 20220208988
    Abstract: A semiconductor device with less variations in transistor characteristics is provided.
    Type: Application
    Filed: April 27, 2020
    Publication date: June 30, 2022
    Inventors: Shunpei YAMAZAKI, Tsutomu MURAKAWA, Shinya SASAGAWA, Naoto YAMADE, Takashi HAMADA, Hiroki KOMAGATA
  • Patent number: 11316051
    Abstract: A semiconductor device includes a transistor including, a first to fifth insulator, a first to third oxide, a first to third conductor. An opening reaching the second oxide is provided in the fourth insulator and the fifth insulator. The third oxide, the third insulator, and the third conductor are arranged sequentially from the inner wall side of the opening so as to fill the opening. In the channel length direction of the transistor, at least part of the fourth insulator in a region where the fourth insulator and the second oxide do not overlap with each other is in contact with the first insulator. In the channel width direction of the transistor, at least part of the third oxide in a region where the third oxide and the second oxide do not overlap with each other is in contact with the first insulator.
    Type: Grant
    Filed: February 21, 2019
    Date of Patent: April 26, 2022
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Katsuaki Tochibayashi, Ryota Hodo, Kentaro Sugaya, Naoto Yamade
  • Publication number: 20210210640
    Abstract: The semiconductor device includes a first conductor and a second conductor; a first insulator to a third insulator; and a first oxide to a third oxide. The first conductor is disposed to be exposed from a top surface of the first insulator. The first oxide is disposed over the first insulator and the first conductor. A first opening reaching the first conductor is provided in the first oxide. The second oxide is disposed over the first oxide. The second oxide comprises a first region, a second region, and a third region positioned between the first region and the second region. The third oxide is disposed over the second oxide. The second insulator is disposed over the third oxide. The second conductor is disposed over the second insulator. The third insulator is disposed to cover the first region and the second region and to be in contact with the top surface of the first insulator.
    Type: Application
    Filed: May 27, 2019
    Publication date: July 8, 2021
    Inventors: Toshihiko TAKEUCHI, Naoto YAMADE, Yutaka OKAZAKI, Sachiaki TEZUKA, Shunpei YAMAZAKI
  • Publication number: 20210167194
    Abstract: A semiconductor device that can be miniaturized or highly integrated is provided. The semiconductor device includes a first conductor, a second conductor over the first conductor, a first insulator covering the second conductor, a first oxide over the first insulator, and a second oxide over the first oxide, an opening overlapping with at least part of the first conductor is provided in the first oxide and the first insulator, and the second oxide is electrically connected to the first conductor through the opening.
    Type: Application
    Filed: February 16, 2021
    Publication date: June 3, 2021
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei YAMAZAKI, Toshihiko TAKEUCHI, Naoto YAMADE, Hiroshi FUJIKI, Tomoaki MORIWAKA, Shunsuke KIMURA
  • Patent number: 11004961
    Abstract: A semiconductor device that can be miniaturized or highly integrated is provided. The semiconductor device includes a first conductor, a second conductor over the first conductor, a first insulator covering the second conductor, a first oxide over the first insulator, and a second oxide over the first oxide, an opening overlapping with at least part of the first conductor is provided in the first oxide and the first insulator, and the second oxide is electrically connected to the first conductor through the opening.
    Type: Grant
    Filed: February 28, 2018
    Date of Patent: May 11, 2021
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Toshihiko Takeuchi, Naoto Yamade, Hiroshi Fujiki, Tomoaki Moriwaka, Shunsuke Kimura
  • Publication number: 20210125988
    Abstract: A semiconductor device that can be miniaturized or highly integrated is provided. The semiconductor device includes an oxide in a channel formation region; the semiconductor device includes a first transistor, a second transistor, a first wiring, a second wiring, and a third wiring, and the first transistor includes the oxide over a first insulator, a second insulator over the oxide, a first conductor over the second insulator, a third insulator over the first conductor, and a fourth insulator in contact with the second insulator, the first conductor, and the third insulator. The second transistor includes the oxide over a fifth insulator, a sixth insulator over the oxide, a second conductor over the sixth insulator, a seventh insulator over the second conductor, and an eighth insulator in contact with the sixth insulator, the second conductor, and the seventh insulator.
    Type: Application
    Filed: February 27, 2018
    Publication date: April 29, 2021
    Applicant: Semiconductors Energy Laboratory Co., Ltd.
    Inventors: Shunpei YAMAZAKI, Toshihiko TAKEUCHI, Naoto YAMADE, Hiroshi FUJIKI, Yuki HATA, Shuhei NAGATSUKA
  • Publication number: 20210057587
    Abstract: A transistor with favorable electrical characteristics is provided. One embodiment of the present invention is a semiconductor device including a semiconductor, a first insulator in contact with the semiconductor, a first conductor in contact with the first insulator and overlapping with the semiconductor with the first insulator positioned between the semiconductor and the first conductor, and a second conductor and a third conductor, which are in contact with the semiconductor. One or more of the first to third conductors include a region containing tungsten and one or more elements selected from silicon, carbon, germanium, tin, aluminum, and nickel.
    Type: Application
    Filed: August 31, 2020
    Publication date: February 25, 2021
    Inventors: Yutaka OKAZAKI, Akihisa SHIMOMURA, Naoto YAMADE, Tomoya TAKESHITA, Tetsuhiro TANAKA
  • Patent number: 10910359
    Abstract: A transistor includes a first insulator over a substrate; a first oxide thereover; a second oxide in contact with at least part of the top surface of the first oxide; a first conductor and a second conductor each in contact with at least part of the top surface of the second oxide; a third oxide that is over the first conductor and the second conductor and is in contact with at least part of the top surface of the second oxide; a second insulator thereover; a third conductor which is over the second insulator and at least part of which overlaps with a region between the first conductor and the second conductor; and a third insulator which is over the third conductor and at least part of which is in contact with the top surface of the first insulator. The thickness of a region of the first insulator that is in contact with the third insulator is less than the thickness of a region of the first insulator that is in contact with the first oxide.
    Type: Grant
    Filed: September 5, 2019
    Date of Patent: February 2, 2021
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Naoki Okuno, Kosei Nei, Hiroaki Honda, Naoto Yamade, Hiroshi Fujiki