Abstract: Communication systems including a case and an accessory are disclosed. In one example, the case supplies electric power. The accessory is connectable to the case with a charging line and a GND line. The charging line transmits and receives a charging signal. The GND line is set to a reference voltage. The accessory includes a requested-operation determination circuit that, based on a voltage level of the charging signal and on a duration time of the voltage level, determines one operation requested of the accessory. In another example, a power management IC is included in the accessory and connected to the case with a charging line and a GND line. The power management IC includes a requested-operation determination circuit that, based on a voltage level of the charging signal and on a duration time of the voltage level, determines one operation requested of the accessory.

Abstract: Provided is an oscillator circuit including an LC oscillator circuit, an amplitude detection circuit, and a bias generation circuit, in which the LC oscillator circuit includes an inductor and at least one variable capacitance element, the amplitude detection circuit detects an oscillation amplitude of the LC oscillator circuit and converts the oscillation amplitude into a DC voltage, and the bias generation circuit compares the DC voltage with a voltage for generating a bias signal, the voltage changing on the basis of a temperature fluctuation of the bias generation circuit, calculates a difference between the DC voltage and a voltage after the change, and generates, on the basis of the difference, a bias signal that reduces a fluctuation in the oscillation amplitude, to control the oscillation amplitude.

Abstract: Communication systems including a case and an accessory are disclosed. In one example, the case supplies electric power. The accessory is connectable to the case with a charging line and a GND line. The charging line transmits and receives a charging signal. The GND line is set to a reference voltage. The accessory includes a requested-operation determination circuit that, based on a voltage level of the charging signal and on a duration time of the voltage level, determines one operation requested of the accessory. In another example, a power management IC is included in the accessory and connected to the case with a charging line and a GND line. The power management IC includes a requested-operation determination circuit that, based on a voltage level of the charging signal and on a duration time of the voltage level, determines one operation requested of the accessory.

Abstract: There are provided an oscillator circuit and a radio receiver capable of reducing a frequency fluctuation of an oscillation frequency to a small extent. There is provided an oscillator circuit including an LC oscillator circuit, an amplitude detection circuit, and a bias generation circuit, in which the LC oscillator circuit includes an inductor and at least one variable capacitance element, the amplitude detection circuit detects an oscillation amplitude of the LC oscillator circuit and converts the oscillation amplitude into a DC voltage, and the bias generation circuit compares the DC voltage with a voltage for generating a bias signal, the voltage changing on the basis of a temperature fluctuation of the bias generation circuit, calculates a difference between the DC voltage and a voltage after the change, and generates, on the basis of the difference, a bias signal that reduces a fluctuation in the oscillation amplitude, to control the oscillation amplitude.

Abstract: The present technology relates to a phase-locked loop that allows a reduction in power consumption. A SAR-ADC that includes two capacitors and outputs a result of comparison between voltages generated from the two capacitors, a current source that charges the two capacitors with current, a first switch that is disposed between one of the two capacitors and the current source and is provided with a phase difference between a first clock of a reference frequency and a second clock having a higher frequency than the first clock, and a second switch that is disposed between another of the two capacitors and the current source and is provided with the second clock are included. The present disclosure can be applied, for example, to a wireless communication device.

Abstract: There is provided a semiconductor device including an oscillation circuit that includes a plurality of capacitors provided on a semiconductor substrate, a conversion circuit that converts an analog signal into a digital signal, and a switch circuit that switches the capacitors on the basis of the digital signal. Further, an oscillation frequency linearly varies with respect to a variation in the analog signal.

Abstract: The present technology relates to a phase-locked loop that allows a reduction in power consumption. A SAR-ADC that includes two capacitors and outputs a result of comparison between voltages generated from the two capacitors, a current source that charges the two capacitors with current, a first switch that is disposed between one of the two capacitors and the current source and is provided with a phase difference between a first clock of a reference frequency and a second clock having a higher frequency than the first clock, and a second switch that is disposed between another of the two capacitors and the current source and is provided with the second clock are included. The present disclosure can be applied, for example, to a wireless communication device.

Abstract: [Overview] [Problem to be Solved] To provide a semiconductor device and a wireless communication apparatus each of which makes it possible to suppress the manufacturing cost and the power consumption while maintaining the manual operability. [Solution] There is provided a semiconductor device including: an oscillation circuit including a plurality of capacitors provided on a semiconductor substrate; a conversion circuit that converts an analog signal into a digital signal; and a switch circuit that switches the capacitors on the basis of the digital signal. An oscillation frequency linearly varies with respect to a variation in the analog signal.

Abstract: A method of sensing a temperature of a semiconductor device, includes: measuring, by a time measuring circuit, time until a count value, which is obtained from a counter by counting a first signal having a frequency corresponding to a first voltage, reaches a largest count value which can be counted by the counter; and obtaining, by the counter, a piece of digital information corresponding to the first voltage based on a count value obtained by counting a second signal having a frequency corresponding to a second voltage, which is different from the first voltage, based on the time measured by the time measuring circuit, the first voltage depending upon the temperature of the semiconductor device.

Abstract: A method of sensing a temperature of a semiconductor device, includes: measuring, by a time measuring circuit, time until a count value, which is obtained from a counter by counting a first signal having a frequency corresponding to a first voltage, reaches a largest count value which can be counted by the counter; and obtaining, by the counter, a piece of digital information corresponding to the first voltage based on a count value obtained by counting a second signal having a frequency corresponding to a second voltage, which is different from the first voltage, based on the time measured by the time measuring circuit, the first voltage depending upon the temperature of the semiconductor device.

Abstract: The present invention provides a semiconductor device having a sensor capable of improving precision while suppressing increase in occupation area. A semiconductor device has: a first counter; and a second counter (time measuring circuit) measuring time until a count value, which is obtained by counting a first signal having a frequency corresponding to a first voltage, reaches a largest count value which can be counted by the first counter. The first counter obtains a piece of digital information corresponding to the first voltage on the basis of a count value obtained by counting a second signal having a frequency corresponding to a second voltage, which is different from the first voltage, on the basis of the time measured by the time measuring circuit.

Abstract: The present invention provides a semiconductor device having a sensor capable of improving precision while suppressing increase in occupation area. A semiconductor device has: a first counter; and a second counter (time measuring circuit) measuring time until a count value, which is obtained by counting a first signal having a frequency corresponding to a first voltage, reaches a largest count value which can be counted by the first counter. The first counter obtains a piece of digital information corresponding to the first voltage on the basis of a count value obtained by counting a second signal having a frequency corresponding to a second voltage, which is different from the first voltage, on the basis of the time measured by the time measuring circuit.

Abstract: A semiconductor device with improved temperature detection accuracy includes a coefficient calculation circuitry which calculates a plurality of N-th order coefficients, where N is an integer equal to or greater than one, of a correction function as an N-th order approximation of a characteristic function which relates temperature data measured by the temperature sensor and the actual temperature. The coefficient calculation circuitry uses N+1 pieces of the temperature data including a theoretical value at absolute zero in the characteristic function and N measured values of the temperature data measured by the temperature sensor unit at N points of temperature. A corrected temperatures are output using the correction function with the calculated coefficients and measured temperature values.

Abstract: Improvement in the accuracy of a temperature sensor is aimed at, suppressing the number of the test temperature in a test process. The semiconductor device comprises a coefficient calculation unit which calculates up to the N-th order coefficient (N is an integer equal to or greater than one) of a correction function as an N-th order approximation of a characteristic function indicating correspondence relation of temperature data measured by a temperature sensor unit and temperature, based on N+1 pieces of the temperature data including a theoretical value at a predetermined temperature in the characteristic function and N measured values of the temperature data measured by the temperature sensor unit at N points of temperature; and a correction operation unit which generates data including information on temperature, by performing calculation using the correction function to which the coefficients calculated are applied, based on temperature data measured by the temperature sensor unit.

Abstract: A semiconductor integrated circuit device which substantially reduces drop in a supply voltage generated by a regulator and ensures stable supply of a supply voltage with high efficiency and high accuracy. In the device, a memory power supply includes a plurality of transistors and an error amplifier. In the transistors, source pads and drain pads are alternately arranged in a row along one edge of a semiconductor chip in a peripheral area of the chip. Transistor gates are formed in parallel with the alternately arranged source pads and drain pads (so that the longitudinal direction of the gates is parallel to the direction of the arrangement of the source pads and drain pads). Consequently, the length of wirings coupled to drains and sources is shortened and the sheet resistance is decreased.

Abstract: A semiconductor integrated circuit device which substantially reduces drop in a supply voltage generated by a regulator and ensures stable supply of a supply voltage with high efficiency and high accuracy. In the device, a memory power supply includes a plurality of transistors and an error amplifier. In the transistors, source pads and drain pads are alternately arranged in a row along one edge of a semiconductor chip in a peripheral area of the chip. Transistor gates are formed in parallel with the alternately arranged source pads and drain pads (so that the longitudinal direction of the gates is parallel to the direction of the arrangement of the source pads and drain pads). Consequently, the length of wirings coupled to drains and sources is shortened and the sheet resistance is decreased.

Abstract: A semiconductor integrated circuit device which substantially reduces drop in a supply voltage generated by a regulator and ensures stable supply of a supply voltage with high efficiency and high accuracy. In the device, a memory power supply includes a plurality of transistors and an error amplifier. In the transistors, source pads and drain pads are alternately arranged in a row along one edge of a semiconductor chip in a peripheral area of the chip. Transistor gates are formed in parallel with the alternately arranged source pads and drain pads (so that the longitudinal direction of the gates is parallel to the direction of the arrangement of the source pads and drain pads). Consequently, the length of wirings coupled to drains and sources is shortened and the sheet resistance is decreased.

Abstract: A semiconductor integrated circuit device which substantially reduces drop in a supply voltage generated by a regulator and ensures stable supply of a supply voltage with high efficiency and high accuracy. In the device, a memory power supply includes a plurality of transistors and an error amplifier. In the transistors, source pads and drain pads are alternately arranged in a row along one edge of a semiconductor chip in a peripheral area of the chip. Transistor gates are formed in parallel with the alternately arranged source pads and drain pads (so that the longitudinal direction of the gates is parallel to the direction of the arrangement of the source pads and drain pads). Consequently, the length of wirings coupled to drains and sources is shortened and the sheet resistance is decreased.