Patents by Inventor Naoya Kimura
Naoya Kimura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11995987Abstract: An information processing apparatus comprises a controller configured to: receive vehicle data from a plurality of vehicles, specify a first vehicle, among the plurality of vehicles, that is predicted to be parked to pick up or drop off a person in a predetermined period of time, based on the vehicle data, make a determination, based on the vehicle data, whether the first vehicle is in a first state in which parking for pick-up of the person is predicted to be performed or a second state in which parking for drop-off of the person is predicted to be performed, and perform assignment of a parking position to the first vehicle based on a result of the determination.Type: GrantFiled: November 2, 2021Date of Patent: May 28, 2024Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: Yasuhiro Hayashi, Kazunori Fujimori, Takuji Yamada, Naoya Oka, Daisuke Kimura, Yumiko Yamashita
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Patent number: 11925648Abstract: The present invention provides a solid dosage form having good stability, suspensibility in water and fluidity by preparing a solid dosage form containing a compound represented by formula (I) or a pharmaceutically acceptable salt thereof, a stabilizer, a sugar alcohol and/or a sugar, a water-soluble polymer and an inorganic substance.Type: GrantFiled: October 22, 2020Date of Patent: March 12, 2024Assignee: SHIONOGI & CO., LTD.Inventors: Naoya Mizutani, Masayuki Morimoto, Maki Okabe, Masaaki Ito, Go Kimura
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Publication number: 20220310795Abstract: A method for manufacturing a silicon carbide epitaxial substrate which has a first surface which is a (000-1) C-face, a silicon carbide epitaxial layer located on the first surface of the silicon carbide substrate, and a line-shaped surface defect density on a top surface of the silicon carbide epitaxial layer is less than 1.0 cm?2 and a stacking fault density is less than 1.2 cm?2.Type: ApplicationFiled: March 4, 2022Publication date: September 29, 2022Inventors: Tsuyoshi MIURA, Hodaka ICHIKAWA, Naoya KIMURA, Hiroyuki OKUDA, Taisuke HIROOKA
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Patent number: 11137446Abstract: A test apparatus is configured to test a DUT that does not support synchronous control from an external circuit. A main controller is configured based on an architecture that tests a device by synchronous control with the main controller itself as the master. A MIU is configured as an interface between the main controller and the DUT. The MIU establishes asynchronous control between it and the DUT with the DUT as the master, and establishes control between it and the main controller with the main controller as the master.Type: GrantFiled: September 24, 2019Date of Patent: October 5, 2021Assignee: ADVANTEST CORPORATIONInventors: Shuichi Inage, Kazuhiro Iezumi, Tomoyuki Itakura, Keisuke Kusunoki, Yoshihiro Kato, Kazuhiro Tsujikawa, Naoya Kimura, Yuki Watanabe, Yuichiro Harada, Koji Miyauchi
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Publication number: 20200225286Abstract: A test apparatus is configured to test a DUT that does not support synchronous control from an external circuit. A main controller is configured based on an architecture that tests a device by synchronous control with the main controller itself as the master. A MIU is configured as an interface between the main controller and the DUT. The MIU establishes asynchronous control between it and the DUT with the DUT as the master, and establishes control between it and the main controller with the main controller as the master.Type: ApplicationFiled: September 24, 2019Publication date: July 16, 2020Inventors: Shuichi INAGE, Kazuhiro IEZUMI, Tomoyuki ITAKURA, Keisuke KUSUNOKI, Yoshihiro KATO, Kazuhiro TSUJIKAWA, Naoya KIMURA, Yuki WATANABE, Yuichiro HARADA, Koji MIYAUCHI
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Patent number: 8228324Abstract: A display includes capacitive display elements, output drivers, scan switches, precharge switches, and a precharge stopper. The drivers provide drive currents or voltages corresponding to display data, thereby driving the display elements correspondingly to the data. The precharge stopper determines whether display data corresponds to a specific state and prevents the display element from being precharged when the display data corresponds to the specific state.Type: GrantFiled: September 25, 2009Date of Patent: July 24, 2012Assignee: Lapis Semiconductor Co., Ltd.Inventors: Naoya Kimura, Hiroyoshi Ichikura
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Patent number: 7944417Abstract: A display device includes a controller detecting a black line, in which all light emitting diodes in one line are non-luminescence, counting a number of times (S) that display data indicating the black line is sent to the display panel in serial, halting a scanning operation to the display data indicating the black line, applying the time period for halting the scanning operation to another time period for displaying display data, which are next to the display data indicating the black line and which is not the display data indicating the black line, whereby the another time period for displaying display data is set to “S+1” times longer than a stipulated time period, and sending a control signal to a column driver, which controls the column driver to set a drive current or voltage applied from a power source to a 1/(S+1) of the stipulated value for the “S+1” time period.Type: GrantFiled: January 23, 2008Date of Patent: May 17, 2011Assignee: Oki Semiconductor Co., Ltd.Inventors: Seiichirou Ishimoto, Naoya Kimura
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Patent number: 7834869Abstract: A display panel driver has two driver circuits that drive separate halves of a display panel. Each driver circuit occupies a separate integrated circuit chip. The driver has a screen saving mode in which each driver circuit displays an independent screen saving image that moves in synchronization with a timing signal. The timing signal is generated in one driver circuit and transmitted by a chip-to-chip interface to the other driver circuit. The two screen saving images are thereby coordinated to create what appears to be a single screen saving display.Type: GrantFiled: July 14, 2005Date of Patent: November 16, 2010Assignee: Oki Semiconductor Co., Ltd.Inventors: Akira Kondo, Naoya Kimura, Haruyo Takayanagi, Tetsuro Hara, Takayuki Shimizu, Hiroyoshi Ichkura
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Patent number: 7773053Abstract: The object of the invention is elimination of an occurrence of instantaneous light in the center part of a display, a border between the upper half and the lower half of the display. An scanning method of the display, dividing the display panel to a first filed and a second filed, starts a counter therein, synchronized with the timing of driving a first row electrode of the first filed thereof, and drives a first row electrode of the second filed thereof, every time the counter value changes.Type: GrantFiled: August 1, 2005Date of Patent: August 10, 2010Assignee: Oki Semiconductor Co., Ltd.Inventors: Haruyo Takayanagi, Akira Kondo, Tetsuro Hara, Naoya Kimura, Takayuki Shimizu, Shuji Furuichi
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Patent number: 7696962Abstract: A color balancing circuit for a flat panel display such as an electroluminescent display generates a primary current that can be varied to adjust the overall brightness of the display. Three currents related to the primary current by selectable ratios are generated, by current mirror circuits, for example; the ratios can be individually varied to adjust the color balance. Driving currents are generated from the three adjusted currents, by mirroring the adjusted currents, for example, and are used to drive display elements that emit light in the three primary colors. Image brightness and color balance can accordingly be adjusted separately, even though both are adjusted by adjusting the driving current. Circuit size is reduced in that the same primary current is used for all three primary colors.Type: GrantFiled: May 12, 2005Date of Patent: April 13, 2010Assignee: Oki Semiconductor Co., Ltd.Inventors: Tetsuro Hara, Naoya Kimura, Takayuki Shimizu, Akira Kondo, Haruyo Takayanagi, Shinichi Satoh
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Publication number: 20100013826Abstract: A display includes capacitive display elements, output drivers, scan switches, precharge switches, and a precharge stopper. The drivers provide drive currents or voltages corresponding to display data, thereby driving the display elements correspondingly to the data. The precharge stopper determines whether display data corresponds to a specific state and prevents the display element from being precharged when the display data corresponds to the specific state.Type: ApplicationFiled: September 25, 2009Publication date: January 21, 2010Applicant: OKI SEMICONDUCTOR CO., LTD.Inventors: Naoya Kimura, Hiroyoshi Ichikura
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Patent number: 7619621Abstract: A display includes capacitive display elements, output drivers, scan switches, precharge switches, and a precharge stopper. The drivers provide drive currents or voltages corresponding to display data, thereby driving the display elements correspondingly to the data. The precharge stopper determines whether display data corresponds to a specific state and prevents the display element from being precharged when the display data corresponds to the specific state.Type: GrantFiled: June 7, 2006Date of Patent: November 17, 2009Assignee: Oki Semiconductor Co., Ltd.Inventors: Naoya Kimura, Hiroyoshi Ichikura
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Patent number: 7586471Abstract: Disclosed is a drive circuit for a panel display device for driving light-emitting devices arranged at respective intersections between a plurality of data lines and a plurality of scan lines. This drive circuit includes a voltage control circuit for charging the light-emitting devices to a voltage necessary for light emission by connecting the data lines to a predetermined power supply potential in a rising period prior to a period for selectively causing the light-emitting devices to emit light; and a drive control circuit for selectively connecting the data lines to a constant current source after the rising period.Type: GrantFiled: July 28, 2005Date of Patent: September 8, 2009Assignee: Oki Semiconductor Co., Ltd.Inventors: Shinichi Satoh, Naoya Kimura, Tetsuro Hara
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Patent number: 7511508Abstract: There are measured characteristics of a jig (fixture) used to calculate and measure circuit parameters of a device under test. There is provided a jig characteristic measuring device which measures the jig characteristics of a jig which includes signal lines used to connect a DUT and a network analyzer with each other (namely, the reflection characteristics of the signal lines, and the transmission S parameters), measures the reflection coefficients of the signal lines in an open state where the DUT is not connected to the signal lines measures the reflection coefficients of the signal lines in a short-circuit state where all the signal lines are grounded, and derives the jig characteristics of the jig based on these measured results.Type: GrantFiled: June 13, 2005Date of Patent: March 31, 2009Assignee: Advantest CorporationInventors: Masato Haruta, Hiroyuki Konno, Naoya Kimura, Yoshikazu Nakayama
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Publication number: 20080266277Abstract: Disclosed is a method and device of driving a display panel, which is capable of suppressing complexity and increase of circuit scale of the driving device, and performing a control to prevent a cathode reset method or a scanning operation from being performed when all anode data are black and thus prevent unnecessary parasitic capacitance from being pre-charged, which may result in alleviation of pseudo emission and reduction of power consumption. The driving device of the display panel includes an anode driver and a cathode driver connected to a display panel including EL elements arranged at intersections of a plurality of anode lines and a plurality of cathode lines.Type: ApplicationFiled: April 14, 2008Publication date: October 30, 2008Inventors: Hiroyoshi Ichikura, Naoya Kimura
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Publication number: 20080186258Abstract: A display device includes a controller detecting a black line, in which all light emitting diodes in one line are non-luminescence, counting a number of times (S) that display data indicating the black line is sent to the display panel in serial, halting a scanning operation to the display data indicating the black line, applying the time period for halting the scanning operation to another time period for displaying display data, which are next to the display data indicating the black line and which is not the display data indicating the black line, whereby the another time period for displaying display data is set to “S+1” times longer than a stipulated time period, and sending a control signal to a column driver, which controls the column driver to set a drive current or voltage applied from a power source to a 1/(S+1) of the stipulated value for the “S+1” time period.Type: ApplicationFiled: January 23, 2008Publication date: August 7, 2008Inventors: Seiichirou Ishimoto, Naoya Kimura
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Patent number: 7405995Abstract: A semiconductor storage device has a simple control circuit that is added to a general one-port RAM. Taking a port-A clock signal as the reference, the control circuit generates a select signal that selects a port A during the period from elapse of a first predetermined time from the reference timing until a second predetermined time has elapsed and selects a port B during other periods. The control circuit generates a port-A delayed clock signal in the period in which the port A is selected. The control circuit generates a port-B delayed clock signal during the period from elapse of the second predetermined time until a third predetermined time has elapsed. The control circuit generates a conflict monitoring signal during the period from the reference timing until the second predetermined time has elapsed. When a clock signal is supplied from the port B while the conflict monitoring signal is being generated, the port-B delayed clock signal is masked while the conflict monitoring signal is being generated.Type: GrantFiled: October 13, 2006Date of Patent: July 29, 2008Assignee: Oki Electric Industry Co., Ltd.Inventors: Seiichirou Ishimoto, Kunio Takamatsu, Naoya Kimura
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Patent number: 7349464Abstract: A receiver includes a channel-matched-filter for outputting a Rake-combining result from a digital spread spectrum signal; a carrier recovery circuit which removes an offset of a carrier wave from the combining result; a correlation circuit which detects correlation; a symbol timing detection circuit which extracts a symbol from the correlation; a symbol determination circuit which regenerates data from the symbol; a framer circuit which discriminates a frame configuration; and a symbol timing recovery circuit which generates a timing phase for each of symbol timings. The channel-matched-filter performs multi-phasing compensation and, in accordance with a timing phase from the symbol timing recovery circuit, performs synchronization tracking.Type: GrantFiled: May 6, 2004Date of Patent: March 25, 2008Assignee: Oki Electric Industry Co., Ltd.Inventor: Naoya Kimura
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Publication number: 20070222455Abstract: There are measured characteristics of a jig (fixture) used to calculate and measure circuit parameters of a device under test. There is provided a jig characteristic measuring device which measures the jig characteristics of a jig 3 which includes signal lines 3a, 3b, 3c, and 3d used to connect a DUT 2 and a network analyzer 1 with each other (namely, the reflection characteristics of signal lines 3a, 3b, 3c, and 3d, and the transmission S parameters), measures the reflection coefficients of the signal lines 3a, 3b, 3c, and 3d in an open state where the DUT 2 is not connected to the signal lines 3a, 3b, 3c, and 3d, measures the reflection coefficients of the signal lines 3a, 3b, 3c, and 3d in a short-circuit state where all the signal lines 3a, 3b, 3c, and 3d are grounded, and derives the jig characteristics of the jig 3 based on these measured results.Type: ApplicationFiled: June 13, 2005Publication date: September 27, 2007Applicant: ADVANTEST CORPORATIONInventors: Masato Haruta, Hiroyuki Konno, Naoya Kimura, Yoshikazu Nakayama
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Publication number: 20070120778Abstract: A drive apparatus of a display panel is provided with an anode driver that drives m anode lines CL, a cathode driver that scans n cathode lines RL, and control means. In a process of pre-charging a parasitic capacity Cp of display elements connected to any of the scan lines RL whichever selected by the cathode driver, the control means switches a connection of L of the n scan lines RL and the m anode lines CL to a ground terminal, and applies voltage control with (L/n)×Vccr for application of an initial output voltage of the anode driver at about an EL element drive voltage Vf. In this manner, the parasitic capacity Cp of the EL elements connected to L scan lines RL is pre-charged. With such a drive apparatus of the display panel, without causing to be complicated in configuration, and without increasing the size of the circuit, it becomes possible to set and control a voltage for pre-charging a parasitic capacity of organic EL elements to be any needed voltage or current.Type: ApplicationFiled: October 12, 2006Publication date: May 31, 2007Applicant: Oki Electric Industry Co.Inventors: Naoya Kimura, Tetsurou Hara, Takayuki Shimizu