Patents by Inventor Naoya Watanabe
Naoya Watanabe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9818645Abstract: Embodiments provided are a through electrode that can be manufactured by a method not including the step of removing a side-wall insulating film formed at the bottom part of the through hole and so having improved electrical characteristics and mechanical reliability and a manufacturing method thereof as well as a semiconductor device and a manufacturing method thereof. A through electrode is disposed in a semiconductor substrate, and includes: a conductive layer; a side-wall insulating film that is disposed between the conductive layer and the semiconductor substrate, the side-wall insulating film being represented by the following chemical formula (1), and a tubular semiconductor layer disposed between the conductive layer and the semiconductor substrate, the semiconductor layer including a same material as the material of the semiconductor substrate.Type: GrantFiled: August 30, 2016Date of Patent: November 14, 2017Assignee: NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGYInventors: Masahiro Aoyagi, Tung Thanh Bui, Naoya Watanabe, Katsuya Kikuchi, Wei Feng
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Publication number: 20170200644Abstract: Embodiments provided are a through electrode that can be manufactured by a method not including the step of removing a side-wall insulating film formed at the bottom part of the through hole and so having improved electrical characteristics and mechanical reliability and a manufacturing method thereof as well as a semiconductor device and a manufacturing method thereof. A through electrode is disposed in a semiconductor substrate, and includes: a conductive layer; a side-wall insulating film that is disposed between the conductive layer and the semiconductor substrate, the side-wall insulating film being represented by the following chemical formula (1), and a tubular semiconductor layer disposed between the conductive layer and the semiconductor substrate, the semiconductor layer including a same material as the material of the semiconductor substrate.Type: ApplicationFiled: August 30, 2016Publication date: July 13, 2017Inventors: Masahiro AOYAGI, Tung Thanh BUI, Naoya WATANABE, Katsuya KIKUCHI, Wei FENG
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Patent number: 9627347Abstract: A method of manufacturing a semiconductor device according to the present invention comprises: a bump forming step of forming a bump electrode 100 on a semiconductor chip 1, the bump electrode 100 protruding in a substantially conical shape; a pad forming step of forming a pad electrode 200 on a substrate 10, the pad electrode 200 having a recess 210 with inner lateral surfaces thereof defining a substantially pyramidal shape or a prism shape; a pressing step of pressing the bump electrode 100 and the pad electrode 200 in a direction which brings them closer to each other, with the bump electrode 100 being inserted in the recess 210 so that the central axis of the bump electrode 100 and the central axis of the recess 210 coincide with each other; and an ultrasonic joining step of joining the bump electrode 100 and the pad electrode 200 by vibrating at least one of the bump electrode 100 and the pad electrode 200 using ultrasonic waves.Type: GrantFiled: August 29, 2013Date of Patent: April 18, 2017Assignee: National Institute of Advanced Industrial Science and TechnologyInventors: Masahiro Aoyagi, Thanh Tung Bui, Motohiro Suzuki, Naoya Watanabe, Fumiki Kato, Lai Na Ma, Shunsuke Nemoto
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Patent number: 9620214Abstract: An entry including multiple bits of unit cells each storing data bit is coupled to a match line. The match line is supplied with a charging current having a restricted current value smaller than a match line current flowing in a one-bit miss state in one entry, but larger than a match line current flowing in an all-bit match state in one entry. A precharge voltage level of a match line is restricted to a voltage level of half a power supply voltage or smaller. Power consumption in a search cycle of a content addressable memory can be reduced, and a search operation speed can be increased.Type: GrantFiled: April 20, 2015Date of Patent: April 11, 2017Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Naoya Watanabe, Isamu Hayashi, Teruhiko Amano, Fukashi Morishita, Kenji Yoshinaga, Mihoko Akiyama, Shinya Miyazaki, Masakazu Ishibashi, Katsumi Dosaka
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Publication number: 20170060438Abstract: The present invention makes it possible to form a circuit configuration that is capable of executing a keyword search at an increased speed while suppressing an increase in the memory capacity of a content-addressable memory. A semiconductor device according to an aspect of the present invention searches an input data string for a predesignated keyword, and includes a first content-addressable memory that stores a partial keyword corresponding to a predetermined number of data beginning with the first data of the keyword, a second content-addressable memory that stores the entirety of the keyword, and a control circuit that is coupled to the first content-addressable memory and to the second content-addressable memory. When a portion matching the partial keyword is detected in the input data string by a search in the first content-addressable memory, the second content-addressable memory executes a search on search data extracted from the input data string.Type: ApplicationFiled: August 4, 2016Publication date: March 2, 2017Inventors: Futoshi IGAUE, Kenji YOSHINAGA, Naoya WATANABE, Mihoko AKIYAMA
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Publication number: 20170062051Abstract: The consumption current of a TCAM device is reduced. A semiconductor device includes multiple sub-arrays each including a TCAM cell array. Each sub-array searches the corresponding part of the input search data. Each sub-array outputs the search result indicative of a match for every entry without searching, when the corresponding first control signal is activated.Type: ApplicationFiled: August 3, 2016Publication date: March 2, 2017Inventors: Naoya WATANABE, Futoshi IGAUE
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Patent number: 9547382Abstract: A first cabinet comprising a first display module and a second cabinet comprising a second display module are provided. A switching is allowed between: a first state in which the first cabinet is placed on top of the second display module and the first display module faces outside, and a second state in which the first cabinet and the second cabinet are arranged next to each other and the first display module and the second display module face outside. A first screen to be displayed by the first display module and a second screen to be displayed by the second display module are stored and a screen switching operation is detected. Displaying of the first screen on the first display module is canceled and the second screen is displayed on the first display module, when the screen switching operation is detected in the first state.Type: GrantFiled: September 30, 2014Date of Patent: January 17, 2017Assignee: KYOCERA CORPORATIONInventors: Akiko Inami, Naoya Watanabe
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Publication number: 20160322282Abstract: Provided are a through electrode including an organic side-wall insulating film, capable of eliminating a barrier layer and achieving satisfactory mechanical reliability and electrical reliability and a manufacturing method thereof, and a semiconductor device and a manufacturing method thereof. According to one aspect of the present invention, a through electrode disposed in a semiconductor substrate is provided, including: a copper layer in the semiconductor substrate; and a side-wall insulating film that is disposed between the copper layer and the semiconductor substrate so as to be in contact with the copper layer and the semiconductor substrate, the side-wall insulating film being represented by the following chemical formula (1).Type: ApplicationFiled: October 30, 2015Publication date: November 3, 2016Inventors: Masahiro AOYAGI, Tung Thanh BUI, Naoya WATANABE, Fumiki KATO, Katsuya KIKUCHI
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Patent number: 9400522Abstract: A portable terminal apparatus is provided, which includes a first cabinet having a first display surface, a second cabinet having a second display surface, a support mechanism which supports the first and second cabinets to be switchable between first and second arrangement states which are different in a relative position between the first and second display surfaces, and a control unit which controls a display mode of the first and second display surfaces according to the switching between the first and second arrangement states.Type: GrantFiled: April 26, 2012Date of Patent: July 26, 2016Assignee: KYOCERA CorporationInventors: Akiko Inami, Naoya Watanabe
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Publication number: 20160005465Abstract: The present invention provides a content addressable memory capable of higher frequency operation than conventional. When a search enable signal supplied from a search control circuit is asserted, each of search line drivers transfers search data to each CAM cell of a CAM memory array via a search line pair. The search line enable signal is transmitted to the search line drivers via a single control signal line coupled to the search control circuit. The control signal line is coupled to the search line drivers in such a manner that the search line enable signal passes through coupling nodes between the search line drivers and the control signal line in an arrangement order of the search line drivers from the side far away as viewed from match amplifiers.Type: ApplicationFiled: September 10, 2015Publication date: January 7, 2016Inventor: Naoya WATANABE
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Publication number: 20150302996Abstract: A photoelectrode for dye-sensitized solar cells of the present invention includes a light-transmitting substrate including a transparent electroconductive layer formed on a light-transmitting base; an adhesion layer formed on the transparent electroconductive layer, the adhesion layer being configured of an electroconductive portion formed of electroconductive particles and a coating layer formed by applying metal alkoxide thereon to cover the electroconductive particles; and a photoelectric conversion layer formed on the adhesion layer by using a photoelectric conversion material in which a sensitizing dye is supported on a functional semiconductor.Type: ApplicationFiled: April 22, 2015Publication date: October 22, 2015Applicants: TOKYO UNIVERSITY OF SCIENCE EDUCATIONAL FOUNDATION ADMINISTRATIVE ORGANIZATION, TOPPAN PRINTING CO., LTD.Inventors: Naoya WATANABE, Tomohiro KUDO, Hironobu OZAWA, Hironori ARAKAWA, Naoyuki SHIBAYAMA
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Patent number: 9142295Abstract: A content addressable memory includes a memory array having a plurality of match lines extending in a first direction, a plurality of search lines extending in a second direction perpendicular to the first direction, and a plurality of memory cells, each disposed at points where the match lines and the search lines intersect. The content addressable memory also includes a plurality of search line drivers, each of the search line drivers being provided to drive the search lines based on search data; a search control circuit generating a search line enable signal, and including a first and a second transistor, the first transistor) for output the search line enable signal and the second transistor for receiving the search line enable signal; and a control signal wiring coupled to the search control circuit and transmitting the search line enable signal to each of the search line drivers.Type: GrantFiled: October 30, 2014Date of Patent: September 22, 2015Assignee: RENESAS ELECTRONICS CORPORATIONInventor: Naoya Watanabe
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Publication number: 20150235984Abstract: A method of manufacturing a semiconductor device according to the present invention comprises: a bump forming step of forming a bump electrode 100 on a semiconductor chip 1, the bump electrode 100 protruding in a substantially conical shape; a pad forming step of forming a pad electrode 200 on a substrate 10, the pad electrode 200 having a recess 210 with inner lateral surfaces thereof defining a substantially pyramidal shape or a prism shape; a pressing step of pressing the bump electrode 100 and the pad electrode 200 in a direction which brings them closer to each other, with the bump electrode 100 being inserted in the recess 210 so that the central axis of the bump electrode 100 and the central axis of the recess 210 coincide with each other; and an ultrasonic joining step of joining the bump electrode 100 and the pad electrode 200 by vibrating at least one of the bump electrode 100 and the pad electrode 200 using ultrasonic waves.Type: ApplicationFiled: August 29, 2013Publication date: August 20, 2015Applicant: National Institute of Advanced Industrial Science and TechnologyInventors: Masahiro Aoyagi, Thanh Tung Bui, Motohiro Suzuki, Naoya Watanabe, Fumiki Kato, Lai Na Ma, Shunsuke Nemoto
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Publication number: 20150228341Abstract: An entry including multiple bits of unit cells each storing data bit is coupled to a match line. The match line is supplied with a charging current having a restricted current value smaller than a match line current flowing in a one-bit miss state in one entry, but larger than a match line current flowing in an all-bit match state in one entry. A precharge voltage level of a match line is restricted to a voltage level of half a power supply voltage or smaller. Power consumption in a search cycle of a content addressable memory can be reduced, and a search operation speed can be increased.Type: ApplicationFiled: April 20, 2015Publication date: August 13, 2015Inventors: Naoya WATANABE, Isamu HAYASHI, Teruhiko AMANO, Fukashi MORISHITA, Kenji YOSHINAGA, Mihoko AKIYAMA, Shinya MIYAZAKI, Masakazu ISHIBASHI, Katsumi DOSAKA
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Patent number: 9073077Abstract: A spray gun (1) forms a desired spray pattern by atomizing by means of atomizing air (A) a spray liquid which is sprayed from a liquid ejection port (44) opened/closed by a needle valve (4), and jetting pattern air (P) to the flow of spray mist of the atomized spray liquid. A nozzle taper angle (?1) is set in a range of 5° to 15°, and a cap taper angle (?2) is set in a range of 20° to 40°. Atomizing air (A) is jetted from a nozzle insertion hole (58) toward the center of a nozzle (3). Pattern air (P) is jetted in a spreading suppressed region (R) wherein the flow of the spray mist does not spread over an area greater than or equal to a predetermined cross-sectional area, to the flow of spray mist, and as a result, the spray mist is more uniformly sprayed over a wide range.Type: GrantFiled: October 19, 2010Date of Patent: July 7, 2015Assignee: FREUND CORPORATIONInventors: Kazuomi Unosawa, Shigemi Isobe, Takerou Adachi, Hirotsune Yasumi, Kouji Fukuda, Naoya Watanabe
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Publication number: 20150187512Abstract: A counter electrode for a dye sensitized solar cell (20 ) includes a conductive layer (21 ); and a contact preventing layer (23 ) which is formed of an insulating substance, and is formed on one surface of the conductive layer (21 ).Type: ApplicationFiled: March 16, 2015Publication date: July 2, 2015Applicants: TOKYO UNIVERSITY OF SCIENCE EDUCATIONAL FOUNDATION ADMINISTRATIVE ORGANIZATION, TOPPAN PRINTING CO., LTD.Inventors: Naoya WATANABE, Tomohiro KUDO, Syougo MUROYA, Kouya NOZAWA, Hironobu OZAWA, Hironori ARAKAWA, Naoyuki SHIBAYAMA
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Patent number: 9042148Abstract: An entry including multiple bits of unit cells each storing data bit is coupled to a match line. The match line is supplied with a charging current having a restricted current value smaller than a match line current flowing in a one-bit miss state in one entry, but larger than a match line current flowing in an all-bit match state in one entry. A precharge voltage level of a match line is restricted to a voltage level of half a power supply voltage or smaller. Power consumption in a search cycle of a content addressable memory can be reduced, and a search operation speed can be increased.Type: GrantFiled: January 9, 2014Date of Patent: May 26, 2015Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Naoya Watanabe, Isamu Hayashi, Teruhiko Amano, Fukashi Morishita, Kenji Yoshinaga, Mihoko Akiyama, Shinya Miyazaki, Masakazu Ishibashi, Katsumi Dosaka
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Publication number: 20150055390Abstract: The present invention provides a content addressable memory capable of higher frequency operation than conventional. When a search enable signal supplied from a search control circuit is asserted, each of search line drivers transfers search data to each CAM cell of a CAM memory array via a search line pair. The search line enable signal is transmitted to the search line drivers via a single control signal line coupled to the search control circuit. The control signal line is coupled to the search line drivers in such a manner that the search line enable signal passes through coupling nodes between the search line drivers and the control signal line in an arrangement order of the search line drivers from the side far away as viewed from match amplifiers.Type: ApplicationFiled: October 30, 2014Publication date: February 26, 2015Inventor: Naoya WATANABE
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Publication number: 20150015524Abstract: A first cabinet comprising a first display module and a second cabinet comprising a second display module are provided. A switching is allowed between: a first state in which the first cabinet is placed on top of the second display module and the first display module faces outside, and a second state in which the first cabinet and the second cabinet are arranged next to each other and the first display module and the second display module face outside. A first screen to be displayed by the first display module and a second screen to be displayed by the second display module are stored and a screen switching operation is detected. Displaying of the first screen on the first display module is canceled and the second screen is displayed on the first display module, when the screen switching operation is detected in the first state.Type: ApplicationFiled: September 30, 2014Publication date: January 15, 2015Inventors: Akiko INAMI, Naoya WATANABE
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Patent number: 8902624Abstract: The present invention provides a content addressable memory capable of higher frequency operation than conventional. When a search enable signal supplied from a search control circuit is asserted, each of search line drivers transfers search data to each CAM cell of a CAM memory array via a search line pair. The search line enable signal is transmitted to the search line drivers via a single control signal line coupled to the search control circuit. The control signal line is coupled to the search line drivers in such a manner that the search line enable signal passes through coupling nodes between the search line drivers and the control signal line in an arrangement order of the search line drivers from the side far away as viewed from match amplifiers.Type: GrantFiled: August 3, 2010Date of Patent: December 2, 2014Assignee: Renesas Electronics CorporationInventor: Naoya Watanabe