Patents by Inventor Naoyuki Koizumi

Naoyuki Koizumi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11881794
    Abstract: An electrostatic adsorption member includes a dielectric member having a first surface and a second surface opposite to the first surface and formed with a through-hole penetrating from the first surface to the second surface, and a porous body provided in the through-hole and having a third surface flush with the first surface. The through-hole has a first opening apart from the first surface by a first distance in a first direction perpendicular to the first surface, and a second opening apart from the first surface by a second distance larger than the first distance in the first direction. In a plan view from the first direction, at least a portion of the first opening is inside the second opening, and the porous body has a first portion located inside the first opening, and a second portion connected to the first portion and located outside the first opening.
    Type: Grant
    Filed: April 22, 2022
    Date of Patent: January 23, 2024
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Hiroyuki Kobayashi, Naoyuki Koizumi, Akihiko Tateiwa
  • Patent number: 11848224
    Abstract: An electrostatic chuck includes: a ceramic plate; an adsorption electrode that is built in the ceramic plate; and a plurality of connection pads that are built in the ceramic plate to be electrically connected to the adsorption electrode. The connection pads are arranged stepwise.
    Type: Grant
    Filed: March 15, 2022
    Date of Patent: December 19, 2023
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Naoyuki Koizumi, Kazunori Shimizu, Kentaro Kobayashi
  • Publication number: 20220345054
    Abstract: An electrostatic adsorption member includes a dielectric member having a first surface and a second surface opposite to the first surface and formed with a through-hole penetrating from the first surface to the second surface, and a porous body provided in the through-hole and having a third surface flush with the first surface. The through-hole has a first opening apart from the first surface by a first distance in a first direction perpendicular to the first surface, and a second opening apart from the first surface by a second distance larger than the first distance in the first direction. In a plan view from the first direction, at least a portion of the first opening is inside the second opening, and the porous body has a first portion located inside the first opening, and a second portion connected to the first portion and located outside the first opening.
    Type: Application
    Filed: April 22, 2022
    Publication date: October 27, 2022
    Inventors: Hiroyuki Kobayashi, Naoyuki Koizumi, Akihiko Tateiwa
  • Publication number: 20220301917
    Abstract: An electrostatic chuck includes: a ceramic plate; an adsorption electrode that is built in the ceramic plate; and a plurality of connection pads that are built in the ceramic plate to be electrically connected to the adsorption electrode. The connection pads are arranged stepwise.
    Type: Application
    Filed: March 15, 2022
    Publication date: September 22, 2022
    Inventors: Naoyuki Koizumi, Kazunori Shimizu, Kentaro Kobayashi
  • Patent number: 9646926
    Abstract: A wiring substrate includes a first wiring layer including a first wiring part having a first wiring interval and a second wiring part having a second wiring interval wider than the first wiring interval, a metal plane layer formed on a portion of a first insulation layer formed on the first wiring layer, the first wiring part being located below the portion, a second insulation layer formed on the first insulation layer and the metal plane layer and having a first via hole and a second via hole, a second wiring layer formed on the second insulation layer and connected to the first wiring layer via a first via conductor formed in the first via hole, and a third wiring layer formed on the second insulation layer and connected to the metal plane layer via a second via conductor formed in the second via hole.
    Type: Grant
    Filed: June 1, 2016
    Date of Patent: May 9, 2017
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Yuji Kunimoto, Jun Furuichi, Noriyoshi Shimizu, Naoyuki Koizumi
  • Publication number: 20160276259
    Abstract: A wiring substrate includes a first wiring layer including a first wiring part having a first wiring interval and a second wiring part having a second wiring interval wider than the first wiring interval, a metal plane layer formed on a portion of a first insulation layer formed on the first wiring layer, the first wiring part being located below the portion, a second insulation layer formed on the first insulation layer and the metal plane layer and having a first via hole and a second via hole, a second wiring layer formed on the second insulation layer and connected to the first wiring layer via a first via conductor formed in the first via hole, and a third wiring layer formed on the second insulation layer and connected to the metal plane layer via a second via conductor formed in the second via hole.
    Type: Application
    Filed: June 1, 2016
    Publication date: September 22, 2016
    Inventors: Yuji Kunimoto, Jun Furuichi, Noriyoshi Shimizu, Naoyuki Koizumi
  • Patent number: 9412687
    Abstract: A wiring substrate includes a first wiring layer including a first wiring part having a first wiring interval and a second wiring part having a second wiring interval wider than the first wiring interval, a metal plane layer formed on a portion of a first insulation layer formed on the first wiring layer, the first wiring part being located below the portion, a second insulation layer formed on the first insulation layer and the metal plane layer and having a first via hole and a second via hole, a second wiring layer formed on the second insulation layer and connected to the first wiring layer via a first via conductor formed in the first via hole, and a third wiring layer formed on the second insulation layer and connected to the metal plane layer via a second via conductor formed in the second via hole.
    Type: Grant
    Filed: June 9, 2015
    Date of Patent: August 9, 2016
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Yuji Kunimoto, Jun Furuichi, Noriyoshi Shimizu, Naoyuki Koizumi
  • Patent number: 9386695
    Abstract: There is provided a wiring substrate including: a core substrate including: a first core substrate including: a plate-shaped first glass substrate; and a first through electrode formed through the first glass substrate; a second core substrate including: a plate-shaped second glass substrate; and a second through electrode formed through the second glass substrate, wherein a diameter of the second through electrode is different from that of the first through electrode; and an insulating member encapsulating the first and second core substrates, and a wiring layer formed on at least one surface of the core substrate. The first and second core substrates are arranged to be separated from each other when viewed from a top.
    Type: Grant
    Filed: April 3, 2013
    Date of Patent: July 5, 2016
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Jun Furuichi, Akihiko Tateiwa, Naoyuki Koizumi
  • Publication number: 20150364405
    Abstract: A wiring substrate includes a first wiring layer including a first wiring part having a first wiring interval and a second wiring part having a second wiring interval wider than the first wiring interval, a metal plane layer formed on a portion of a first insulation layer formed on the first wiring layer, the first wiring part being located below the portion, a second insulation layer formed on the first insulation layer and the metal plane layer and having a first via hole and a second via hole, a second wiring layer formed on the second insulation layer and connected to the first wiring layer via a first via conductor formed in the first via hole, and a third wiring layer formed on the second insulation layer and connected to the metal plane layer via a second via conductor formed in the second via hole.
    Type: Application
    Filed: June 9, 2015
    Publication date: December 17, 2015
    Inventors: Yuji Kunimoto, Jun Furuichi, Noriyoshi Shimizu, Naoyuki Koizumi
  • Patent number: 9198290
    Abstract: A wiring substrate includes: a substrate layer made of glass or silicon and including: a first surface formed with a first hole; and a second surface formed with a second hole and being opposite to the first surface, wherein the first hole is communicated with the second hole; a connection pad formed in the second hole; a first wiring layer formed in the first hole and electrically connected to the connection pad; a first insulation layer formed on the first surface of the substrate layer to cover the first wiring layer; and a second wiring layer formed on the first insulation layer and electrically connected to the first wiring layer. A diameter of the first hole is gradually decreased from the first surface toward the second surface, and a diameter of the second hole is gradually decreased from the second surface toward the first surface.
    Type: Grant
    Filed: October 29, 2014
    Date of Patent: November 24, 2015
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Yuji Kunimoto, Naoyuki Koizumi
  • Patent number: 9159648
    Abstract: A wiring substrate includes: a core substrate made of glass and having: a first surface; a second surface opposite to the first surface; and a side surface between the first surface and the second surface; and an insulating layer and a wiring layer, which are formed on at least one of the first surface and the second surface of the core substrate. A plurality of concave portions are formed in the side surface of the core substrate to extend from the first surface to the second surface, and a resin is filled in the respective concave portions.
    Type: Grant
    Filed: July 11, 2013
    Date of Patent: October 13, 2015
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Naoyuki Koizumi, Jun Furuichi, Yasuyoshi Horikawa
  • Patent number: 9078384
    Abstract: A wiring substrate includes a structure in which a plurality of wiring layers are stacked through insulating layers intervening therebetween, and which has a first surface side and a second surface side, the first surface side where a semiconductor element is to be mounted, the second surface side being located at an opposite side to the first surface side, an interposer buried in an outermost one of the insulating layers located at the first surface side, and electrically connected to the semiconductor element to be mounted, and a sheet-shaped member buried in an outermost one of the insulating layers located at the second surface side, wherein, the interposer and the sheet-shaped member are disposed at symmetrical positions symmetrical each other.
    Type: Grant
    Filed: March 12, 2012
    Date of Patent: July 7, 2015
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Jun Furuichi, Akihiko Tateiwa, Naoyuki Koizumi
  • Publication number: 20150048505
    Abstract: A wiring substrate includes: a substrate layer made of glass or silicon and including: a first surface formed with a first hole; and a second surface formed with a second hole and being opposite to the first surface, wherein the first hole is communicated with the second hole; a connection pad formed in the second hole; a first wiring layer formed in the first hole and electrically connected to the connection pad; a first insulation layer formed on the first surface of the substrate layer to cover the first wiring layer; and a second wiring layer formed on the first insulation layer and electrically connected to the first wiring layer. A diameter of the first hole is gradually decreased from the first surface toward the second surface, and a diameter of the second hole is gradually decreased from the second surface toward the first surface.
    Type: Application
    Filed: October 29, 2014
    Publication date: February 19, 2015
    Inventors: Yuji KUNIMOTO, Naoyuki KOIZUMI
  • Patent number: 8907489
    Abstract: A wiring substrate includes: a substrate layer made of glass or silicon and including: a first surface formed with a first hole; and a second surface formed with a second hole and being opposite to the first surface, wherein the first hole is communicated with the second hole; a connection pad formed in the second hole; a first wiring layer formed in the first hole and electrically connected to the connection pad; a first insulation layer formed on the first surface of the substrate layer to cover the first wiring layer; and a second wiring layer formed on the first insulation layer and electrically connected to the first wiring layer. A diameter of the first hole is gradually decreased from the first surface toward the second surface, and a diameter of the second hole is gradually decreased from the second surface toward the first surface.
    Type: Grant
    Filed: September 5, 2012
    Date of Patent: December 9, 2014
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Yuji Kunimoto, Naoyuki Koizumi
  • Patent number: 8692363
    Abstract: A disclosed electric part package includes a supporting member that includes a first area in which an electric part is arranged, and a second area in which a first opening is positioned, the second area being isolated from the first area; a resin part provided on the supporting member thereby to cover the electric part arranged in the first area, the resin part including an electric terminal exposed in the first opening of the supporting member; and a wiring structure provided on the resin part, the wiring structure being electrically connected to the electric part and the electric terminal of the resin part.
    Type: Grant
    Filed: November 14, 2011
    Date of Patent: April 8, 2014
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Naoyuki Koizumi, Masahiro Kyozuka, Kenta Uchiyama
  • Patent number: 8659127
    Abstract: A semiconductor device includes a wiring substrate, and a semiconductor chip, wherein the wiring substrate includes a glass plate having an opening portion penetrating through a first surface of the glass plate to a second surface of the glass plate, a resin portion penetrating through the first surface to the second surface, and a through wiring penetrating through the resin portion from the first surface to the second surface to electrically connect a first wiring layer formed on a side of the first surface with a third wiring layer formed on a side of the second surface, wherein the semiconductor chip is accommodated inside the opening portion.
    Type: Grant
    Filed: May 16, 2012
    Date of Patent: February 25, 2014
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Naoyuki Koizumi, Akihiko Tateiwa
  • Publication number: 20140015121
    Abstract: A wiring substrate includes: a core substrate made of glass and having: a first surface; a second surface opposite to the first surface; and a side surface between the first surface and the second surface; and an insulating layer and a wiring layer, which are formed on at least one of the first surface and the second surface of the core substrate. A plurality of concave portions are formed in the side surface of the core substrate to extend from the first surface to the second surface, and a resin is filled in the respective concave portions.
    Type: Application
    Filed: July 11, 2013
    Publication date: January 16, 2014
    Inventors: Naoyuki Koizumi, Jun Furuichi, Yasuyoshi Horikawa
  • Publication number: 20130264101
    Abstract: There is provided a wiring substrate including: a core substrate including: a first core substrate including: a plate-shaped first glass substrate; and a first through electrode formed through the first glass substrate; a second core substrate including: a plate-shaped second glass substrate; and a second through electrode formed through the second glass substrate, wherein a diameter of the second through electrode is different from that of the first through electrode; and an insulating member encapsulating the first and second core substrates, and a wiring layer formed on at least one surface of the core substrate. The first and second core substrates are arranged to be separated from each other when viewed from a top.
    Type: Application
    Filed: April 3, 2013
    Publication date: October 10, 2013
    Applicant: Shinko Electric Industries Co., Ltd.
    Inventors: Jun FURUICHI, Akihiko TATEIWA, Naoyuki KOIZUMI
  • Patent number: 8481863
    Abstract: A substrate includes a storage portion which is defined by a base for mounting a light emitting element and a wall portion standing up on and from the base. A package is structured such that the upper end of the wall portion so formed as to surround the periphery of the storage portion is connected to a cover to thereby seal a light emitting element. A seal structure is composed of an uneven portion formed on the lower surface side surface of the base, a close contact layer formed on the surface of the uneven portion, a power supply layer formed on the close contact layer, and an electrode layer formed on the surface of the power supply layer. The uneven portion includes a first recessed portion formed at a position spaced in the radial direction from the outer periphery of a through electrode or from the inner wall of a through hole, and a second recessed portion formed at a position spaced further outwardly from the first recessed portion.
    Type: Grant
    Filed: April 2, 2008
    Date of Patent: July 9, 2013
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Akinori Shiraishi, Kei Murayama, Masahiro Sunohara, Naoyuki Koizumi, Mitsutoshi Higashi
  • Publication number: 20130069251
    Abstract: A wiring substrate includes: a substrate layer made of glass or silicon and including: a first surface formed with a first hole; and a second surface formed with a second hole and being opposite to the first surface, wherein the first hole is communicated with the second hole; a connection pad formed in the second hole; a first wiring layer formed in the first hole and electrically connected to the connection pad; a first insulation layer formed on the first surface of the substrate layer to cover the first wiring layer; and a second wiring layer formed on the first insulation layer and electrically connected to the first wiring layer. A diameter of the first hole is gradually decreased from the first surface toward the second surface, and a diameter of the second hole is gradually decreased from the second surface toward the first surface.
    Type: Application
    Filed: September 5, 2012
    Publication date: March 21, 2013
    Applicant: Shinko Electric Industries Co., Ltd.
    Inventors: Yuji KUNIMOTO, Naoyuki Koizumi