Patents by Inventor Narasimha Rao Pesala

Narasimha Rao Pesala has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8392762
    Abstract: A non-volatile memory device comprises an application code sector of sufficient size to store a first copy of an application code and a second copy of the application code; and a boot sector having a boot loader code embodied therein. The boot loader code is configured to cause a processor to check the integrity of both the first and second copies of the application code; if the first copy is corrupted, overwrite the first copy of the application code with the second copy; and if the second copy is corrupted, overwrite the second copy of the application code with the first copy.
    Type: Grant
    Filed: February 4, 2008
    Date of Patent: March 5, 2013
    Assignee: Honeywell International Inc.
    Inventors: Yogesha Aralakuppe Ramegowda, Srinivasa R. Dangeti, Puja Chopra, Narasimha Rao Pesala, Puri Gautam, Shruti Kop, Darshan Raj, Mani Sivaraman, Yugandhar Kumar Puppala, Kaarthikeyan Muthusamy, Sachin Jethe, Mugdalbetta Rajesh Suresh
  • Patent number: 8324906
    Abstract: Hidden or overlapped peaks may occur when using SSTDR technology to determine ware faults. These hidden/overlapped peaks may cause false negative determinations (no fault) when testing a wire for faults. In one method of the present invention, the symmetrical property of the SSTDR wave envelope is used to resolve hidden/overlapped peaks. In another method of the present invention, the calibrated normalized loop back SSTDR wave envelope may be used to resolve hidden/overlapped peaks.
    Type: Grant
    Filed: March 19, 2010
    Date of Patent: December 4, 2012
    Assignee: Honeywell International Inc.
    Inventors: Shaik Shafi Ahamed, Srinivasa Rao Dangeti, Narasimha Rao Pesala, Thappeta Peddaiah, Sreenivasulu Reddy Vedicherla, Vedagiribabu Subramanyam, Zhenning Liu
  • Patent number: 8078342
    Abstract: Methods for active power management, i.e., the power management method may be activated in response to changes in the supply and demand of power in a system, are disclosed. The power management method may use dynamically collected data reporting levels of electrical power utilized by systems while matching them to the available power. One embodiment of the present invention may be applied in smaller or medium sized systems. Another embodiment of the present invention may be implemented making use of additional aircraft resources, such as an integrated modular avionics (IMA) line replaceable unit (LRU) in larger sized systems. Both of these embodiments may make use of data collected from systems utilizing or generating electrical via the bus power control unit (BPCU) LRU, the data processing taking place either locally in the BPCU (small or medium sized systems) or in the IMA (larger systems).
    Type: Grant
    Filed: May 1, 2009
    Date of Patent: December 13, 2011
    Assignee: Honeywell International Inc.
    Inventors: David Lazarovich, Joseph Nutaro, Ted Gayowsky, Ileana Rusan, Sang-Joon Lee, Srinivasa Rao Dangeti, Narasimha Rao Pesala, Lakshminarayana Surisetty, Gopi Gudimetla, Amit Kumar Singh
  • Publication number: 20110227582
    Abstract: Hidden or overlapped peaks may occur when using SSTDR technology to determine ware faults. These hidden/overlapped peaks may cause false negative determinations (no fault) when testing a wire for faults. In one method of the present invention, the symmetrical property of the SSTDR wave envelope is used to resolve hidden/overlapped peaks. In another method of the present invention, the calibrated normalized loop back SSTDR wave envelope may be used to resolve hidden/overlapped peaks.
    Type: Application
    Filed: March 19, 2010
    Publication date: September 22, 2011
    Applicant: HONEYWELL INTERNATIONAL INC.
    Inventors: SHAIK SHAFI AHAMED, SRINIVASA RAO DANGETI, NARASIMHA RAO PESALA, THAPPETA PEDDAIAH, SREENIVASULU REDDY VEDICHERLA, VEDAGIRIBABU SUBRAMANYAM, ZHENNING LIU
  • Publication number: 20100280682
    Abstract: Methods for active power management, i.e., the power management method may be activated in response to changes in the supply and demand of power in a system, are disclosed. The power management method may use dynamically collected data reporting levels of electrical power utilized by systems while matching them to the available power. One embodiment of the present invention may be applied in smaller or medium sized systems. Another embodiment of the present invention may be implemented making use of additional aircraft resources, such as an integrated modular avionics (IMA) line replaceable unit (LRU) in larger sized systems. Both of these embodiments may make use of data collected from systems utilizing or generating electrical via the bus power control unit (BPCU) LRU, the data processing taking place either locally in the BPCU (small or medium sized systems) or in the IMA (larger systems).
    Type: Application
    Filed: May 1, 2009
    Publication date: November 4, 2010
    Inventors: DAVID LAZAROVICH, Joseph Nutaro, Ted Gayowsky, Ileana Rusan, Sang-Joon Lee, Srinivasa Rao Dangeti, Narasimha Rao Pesala, Lakshminarayana Surisetty, Gopi Gudimetla, Amit Kumar Singh
  • Publication number: 20090199014
    Abstract: A microcontroller comprises a random access memory (RAM) device; a non-volatile memory device having a data sector, wherein operation codes are stored as data files in the data sector; and a processor configured to retrieve the operation codes from the data sector, load the retrieved operation codes into the RAM device and run the decrypted operation codes from the RAM device.
    Type: Application
    Filed: February 4, 2008
    Publication date: August 6, 2009
    Applicant: HONEYWELL INTERNATIONAL INC.
    Inventors: Yogesha Aralakuppe Ramegowda, Srinivasa R. Dangeti, Puja Chopra, Narasimha Rao Pesala, Puri Gautam, Shruti Kop, Darshan Raj, Mani Sivaraman, Yugandhar Kumar Puppala, Kaarthikeyan Muthusamy, Sachin Jethe, Mugdalbetta Rajesh Suresh
  • Publication number: 20090199048
    Abstract: A non-volatile memory device comprises an application code sector of sufficient size to store a first copy of an application code and a second copy of the application code; and a boot sector having a boot loader code embodied therein. The boot loader code is configured to cause a processor to check the integrity of both the first and second copies of the application code; if the first copy is corrupted, overwrite the first copy of the application code with the second copy; and if the second copy is corrupted, overwrite the second copy of the application code with the first copy.
    Type: Application
    Filed: February 4, 2008
    Publication date: August 6, 2009
    Applicant: HONEYWELL INTERNATIONAL INC.
    Inventors: Yogesha Aralakuppe Ramegowda, Srinivasa R. Dangeti, Puja Chopra, Narasimha Rao Pesala, Puri Gautam, Shruti Kop, Darshan Raj, Mani Sivaraman, Yugandhar Kumar Puppala, Kaarthikeyan Muthusamy, Sachin Jethe, Mugdalbetta Rajesh Suresh