Abstract: The method involves drying down dye-conjugated reagents in separate locations in a reaction vessel so that the dyes don't non-specifically interact with each other during drying. This invention thus improves multiplex binding assays by eliminating erroneous results caused by dyes' being non-specifically attached to each other when dried down together.

Abstract: An Integrated Circuit (IC) package is provided, comprising a first IC die having a first capacitor and a logic circuit, and a second IC die having a second capacitor. The first IC die and the second IC die may be stacked within the IC package one on top of another and electrically coupled with die-to-die interconnects. The logic circuit is electrically coupled in a power delivery network to the first capacitor and the second capacitor. The first IC die and the second IC die include respective back-end-of-line portions in which the first capacitor and the second capacitor, which may comprise metal-insulator-metal capacitors in some embodiments are situated. In some embodiments, the second capacitor is situated in a shadow of the logic circuit. In various embodiments, the first IC die and the second IC die comprise any suitable pair in a plurality of stacked IC dies within an IC package.

Abstract: The method involves drying down dye-conjugated reagents in separate locations in a reaction vessel so that the dyes don't non-specifically interact with each other during drying. This invention thus improves multiplex binding assays by eliminating erroneous results caused by dyes' being non-specifically attached to each other when dried down together.

Abstract: The method involves drying down dye-conjugated reagents in separate locations in a reaction vessel so that the dyes don't non-specifically interact with each other during drying. This invention thus improves multiplex binding assays by eliminating erroneous results caused by dyes' being non-specifically attached to each other when dried down together.

Abstract: Apparatuses and methods of current balancing, current sensing and phase balancing, offset cancellation, digital to analog current converter with monotonic output using binary coded input (without binary to thermometer decoder), compensator for a voltage regulator (VR), etc.

Abstract: Described are apparatuses and methods of current balancing, current sensing and phase balancing, offset cancellation, digital to analog current converter with monotonic output using binary coded input (without binary to thermometer decoder), compensator for a voltage regulator (VR), etc. In one example, apparatus comprises: a plurality of inductors coupled to a capacitor and a load; a plurality of bridges, each of which is coupled to a corresponding inductor from the plurality of inductors; and a plurality of current sensors, each of which is coupled to a bridge to sense current through a transistor of the bridge.

Abstract: Apparatuses and methods of current balancing, current sensing and phase balancing, offset cancellation, digital to analog current converter with monotonic output using binary coded input (without binary to thermometer decoder), and compensator for a voltage regulator (VR), are provided. In one example, an apparatus includes: a plurality of inductors coupled to a capacitor and a load; a plurality of bridges, each of which is coupled to a corresponding inductor from the plurality of inductors; and a plurality of current sensors, each of which is coupled to a bridge to sense current through a transistor of the bridge.

Abstract: Some embodiments include apparatuses and methods of using such apparatuses. One of the apparatuses includes voltage regulators in an integrated circuit device, and a frequency control block and a module included in the integrated circuit device. Each of the voltage regulators includes a current sensor. The frequency control block operates to provide a clock signal to each of the voltage regulators. The clock signal has a frequency based on digital information. The module operates to receive a current from the current sensor of each of the voltage regulators and provides the digital information to the frequency control block to control the frequency of the clock signal. The digital information has a value based on the current from each of the current sensors.

Abstract: The method involves drying down dye-conjugated reagents in separate locations in a reaction vessel so that the dyes don't non-specifically interact with each other during drying. This invention thus improves multiplex binding assays by eliminating erroneous results caused by dyes' being non-specifically attached to each other when dried down together.

Abstract: Described are apparatuses and methods of current balancing, current sensing and phase balancing, offset cancellation, digital to analog current converter with monotonic output using binary coded input (without binary to thermometer decoder), compensator for a voltage regulator (VR), etc. In one example, apparatus comprises: a plurality of inductors coupled to a capacitor and a load; a plurality of bridges, each of which is coupled to a corresponding inductor from the plurality of inductors; and a plurality of current sensors, each of which is coupled to a bridge to sense current through a transistor of the bridge.

Abstract: Some embodiments include apparatuses and methods of using such apparatuses. One of the apparatuses includes voltage regulators in an integrated circuit device, and a frequency control block and a module included in the integrated circuit device. Each of the voltage regulators includes a current sensor. The frequency control block operates to provide a clock signal to each of the voltage regulators. The clock signal has a frequency based on digital information. The module operates to receive a current from the current sensor of each of the voltage regulators and provides the digital information to the frequency control block to control the frequency of the clock signal. The digital information has a value based on the current from each of the current sensors.

Abstract: Described are apparatuses and methods of current balancing, current sensing and phase balancing, offset cancellation, digital to analog current converter with monotonic output using binary coded input (without binary to thermometer decoder), compensator for a voltage regulator (VR), etc. In one example, apparatus comprises: a plurality of inductors coupled to a capacitor and a load; a plurality of bridges, each of which is coupled to a corresponding inductor from the plurality of inductors; and a plurality of current sensors, each of which is coupled to a bridge to sense current through a transistor of the bridge.

Abstract: Described is a processor comprising: a plurality of transistors operable to provide dynamically adjustable transistor size, the plurality of transistors coupled at one end to a first power supply and coupled at another end to a second power supply; a circuit coupled to the second power supply, the second power supply to provide power to the circuit; and a power control unit (PCU) to monitor the level of the first power supply, and to dynamically adjust the transistor size of the plurality of transistors so that the second power supply is adjusted to keep the circuit operational.

Abstract: Apparatuses and methods of current balancing, current sensing and phase balancing, offset cancellation, digital to analog current converter with monotonic output using binary coded input (without binary to thermometer decoder), compensator for a voltage regulator (VR), etc. are provided here. An apparatus is provided which comprises: a plurality of inductors coupled to a capacitor and a load; a plurality of bridges, each of which is coupled to a corresponding inductor from the plurality of inductors; and a plurality of current sensors, each of which is coupled to a bridge to sense current through a transistor of the bridge.

Abstract: Described is an apparatus having a non-linear control to manage power supply droop at an output of a voltage regulator. The apparatus comprises: a first inductor for coupling to a load; a capacitor, coupled to the first inductor, and for coupling to the load; a first high-side switch couple to the first inductor; a first low-side switch coupled to the first inductor; a bridge controller to control when to turn on and off the first high-side and first low-side switches; and a non-linear control (NLC) unit to monitor output voltage on the load, and to cause the bridge controller to turn on the first high-side switch and turn off the first low-side switch when a voltage droop is detected on the load.

Abstract: Described are apparatuses and methods of current balancing, current sensing and phase balancing, offset cancellation, digital to analog current converter with monotonic output using binary coded input (without binary to thermometer decoder), compensator for a voltage regulator (VR), etc. In one example, apparatus comprises: a plurality of inductors coupled to a capacitor and a load; a plurality of bridges, each of which is coupled to a corresponding inductor from the plurality of inductors; and a plurality of current sensors, each of which is coupled to a bridge to sense current through a transistor of the bridge.

Abstract: Described is a processor comprising: a plurality of transistors operable to provide dynamically adjustable transistor size, the plurality of transistors coupled at one end to a first power supply and coupled at another end to a second power supply; a circuit coupled to the second power supply, the second power supply to provide power to the circuit; and a power control unit (PCU) to monitor the level of the first power supply, and to dynamically adjust the transistor size of the plurality of transistors so that the second power supply is adjusted to keep the circuit operational.

Abstract: Described is a processor comprising: a plurality of transistors operable to provide dynamically adjustable transistor size, the plurality of transistors coupled at one end to a first power supply and coupled at another end to a second power supply; a circuit coupled to the second power supply, the second power supply to provide power to the circuit; and a power control unit (PCU) to monitor the level of the first power supply, and to dynamically adjust the transistor size of the plurality of transistors so that the second power supply is adjusted to keep the circuit operational.

Abstract: Described are apparatuses and methods of current balancing, current sensing and phase balancing, offset cancellation, digital to analog current converter with monotonic output using binary coded input (without binary to thermometer decoder), compensator for a voltage regulator (VR), etc. In one example, apparatus comprises: a plurality of inductors coupled to a capacitor and a load; a plurality of bridges, each of which is coupled to a corresponding inductor from the plurality of inductors; and a plurality of current sensors, each of which is coupled to a bridge to sense current through a transistor of the bridge.

Abstract: Described are apparatuses and methods of current balancing, current sensing and phase balancing, offset cancellation, digital to analog current converter with monotonic output using binary coded input (without binary to thermometer decoder), compensator for a voltage regulator (VR), etc. In one example, an apparatus comprises: a plurality of inductors coupled to a capacitor and a load; a plurality of bridges, each of which is coupled to a corresponding inductor from the plurality of inductors; and a plurality of current sensors, each of which is coupled to a bridge to sense current through a transistor of the bridge.