Patents by Inventor Naresh Nayar
Naresh Nayar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20150378755Abstract: In an embodiment, a request is received for a first partition to execute on a first virtual processor. If the first physical processor is available at a first node, the first virtual processor is dispatched to execute at the first physical processor at the first node that is the home node of the first virtual processor. If the first physical processor is not available, a determination is made whether the first physical processor is assigned to a second virtual processor and a home node of the second virtual processor is not the first node. If the first physical processor is assigned to a second virtual processor and the home node of the second virtual processor is not the first node, execution of the second virtual processor is stopped on the first physical processor and the first virtual processor is dispatched to the first physical processor.Type: ApplicationFiled: September 9, 2015Publication date: December 31, 2015Inventors: Stuart Z. Jacobs, David A. Larson, Naresh Nayar
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Publication number: 20150378770Abstract: A virtual machine backup method includes utilizing a log to indicate updates to memory of a virtual machine when the updates are evicted from a cache of the virtual machine. A guard band is determined that indicates a threshold amount of free space for the log. A determination is made that the guard band will be or has been encroached upon corresponding to indicating an update in the log. A backup image of the virtual machine is updated based, at least in part, on a set of one or more entries of the log, wherein the set of entries is sufficient to comply with the guard band. The set of entries is removed from the log.Type: ApplicationFiled: June 1, 2015Publication date: December 31, 2015Inventors: Guy L. Guthrie, Naresh Nayar, Geraint North, William J. Starke, Albert J. Van Norstrand, JR.
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Patent number: 9213560Abstract: In an embodiment, a request is received for a first partition to execute on a first virtual processor. If the first physical processor is available at a first node, the first virtual processor is dispatched to execute at the first physical processor at the first node that is the home node of the first virtual processor. If the first physical processor is not available, a determination is made whether the first physical processor is assigned to a second virtual processor and a home node of the second virtual processor is not the first node. If the first physical processor is assigned to a second virtual processor and the home node of the second virtual processor is not the first node, execution of the second virtual processor is stopped on the first physical processor and the first virtual processor is dispatched to the first physical processor.Type: GrantFiled: March 14, 2013Date of Patent: December 15, 2015Assignee: International Business Machines CorporationInventors: Stuart Z. Jacobs, David A. Larson, Naresh Nayar
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Patent number: 9189381Abstract: A primary processing unit entitlement is determined for a logical partition. A smaller secondary processing unit entitlement is also determined. A partition manager allocates primary processing units to the logical partition from a primary shared processor pool, and the logical partition is activated. The secondary processing units are reserved for the logical partition from a secondary shared processor pool, and the logical partition can be relocated to the secondary shared processor pool in response to a condition such as a hardware failure. The logical partition can continue to process its workload with the fewer processor resources, and can be restored to the primary processing unit entitlement.Type: GrantFiled: March 15, 2013Date of Patent: November 17, 2015Assignee: International Business Machines CorporationInventors: Naresh Nayar, Geraint North, Bryan M. Logan
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Patent number: 9183017Abstract: In an embodiment, a request is received for a first partition to execute on a first virtual processor. If the first physical processor is available at a first node, the first virtual processor is dispatched to execute at the first physical processor at the first node that is the home node of the first virtual processor. If the first physical processor is not available, a determination is made whether the first physical processor is assigned to a second virtual processor and a home node of the second virtual processor is not the first node. If the first physical processor is assigned to a second virtual processor and the home node of the second virtual processor is not the first node, execution of the second virtual processor is stopped on the first physical processor and the first virtual processor is dispatched to the first physical processor.Type: GrantFiled: March 14, 2013Date of Patent: November 10, 2015Assignee: International Business Machines CorporationInventors: Stuart Z. Jacobs, David A. Larson, Naresh Nayar
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Patent number: 9158470Abstract: A partition manager relocates a logical partition from a primary shared processor pool to a secondary shared processor pool in response to a predetermined condition, such as a hardware failure. The relocated logical partition is allocated a smaller quantity of processing units from the secondary pool than it was allocated from the primary pool. A quantity of processing units reserved for a second logical partition is identified in the secondary shared processor pool, and a portion of those reserved processing units are allocated to the relocated logical partition. The reserved processing units may be redistributed among multiple relocated logical partitions.Type: GrantFiled: March 15, 2013Date of Patent: October 13, 2015Assignee: International Business Machines CorporationInventors: Naresh Nayar, Geraint North, Bryan M. Logan
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Publication number: 20150254473Abstract: Techniques for simulating exclusive use of a processor core amongst multiple logical partitions (LPARs) include providing hardware thread-dependent status information in response to access requests by the LPARs that is reflective of exclusive use of the processor by the LPAR accessing the hardware thread-dependent information. The information returned in response to the access requests is transformed if the requestor is a program executing at a privilege level lower than the hypervisor privilege level, so that each logical partition views the processor as though it has exclusive use of the processor. The techniques may be implemented by a logical circuit block within the processor core that transforms the hardware thread-specific information to a logical representation of the hardware thread-specific information or the transformation may be performed by program instructions of an interrupt handler that traps access to the physical register containing the information.Type: ApplicationFiled: May 26, 2015Publication date: September 10, 2015Inventors: Giles R. Frazier, Bruce Mealey, Naresh Nayar
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Patent number: 9069598Abstract: Techniques for simulating exclusive use of a processor core amongst multiple logical partitions (LPARs) include providing hardware thread-dependent status information in response to access requests by the LPARs that is reflective of exclusive use of the processor by the LPAR accessing the hardware thread-dependent information. The information returned in response to the access requests is transformed if the requestor is a program executing at a privilege level lower than the hypervisor privilege level, so that each logical partition views the processor as though it has exclusive use of the processor. The techniques may be implemented by a logical circuit block within the processor core that transforms the hardware thread-specific information to a logical representation of the hardware thread-specific information or the transformation may be performed by program instructions of an interrupt handler that traps access to the physical register containing the information.Type: GrantFiled: January 6, 2012Date of Patent: June 30, 2015Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Giles R. Frazier, Bruce Mealy, Naresh Nayar
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Patent number: 9069701Abstract: Disclosed is a computer system (100) comprising a processor unit (110) adapted to run a virtual machine in a first operating mode; a cache (120) accessible to the processor unit, said cache including a cache controller (122); and a memory (140) accessible to the cache controller for storing an image of said virtual machine; wherein the processor unit is adapted to create a log (200) in the memory prior to running the virtual machine in said first operating mode; the cache controller is adapted to transfer a modified cache line from the cache to the memory; and write only the memory address of the transferred modified cache line in the log; and the processor unit is further adapted to update a further image of the virtual machine in a different memory location, e.g. on another computer system, by retrieving the memory addresses stored in the log, retrieve the modified cache lines from the memory addresses and update the further image with said modifications.Type: GrantFiled: December 11, 2012Date of Patent: June 30, 2015Assignee: International Business Machines CorporationInventors: Guy Lynn Guthrie, Naresh Nayar, Geraint North, William J. Starke
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Patent number: 9047221Abstract: Disclosed is a computer system (100) comprising a processor unit (110) adapted to run a virtual machine in a first operating mode; a cache (120) accessible to the processor unit, said cache including a cache controller (122); and a memory (140) accessible to the cache controller for storing an image of said virtual machine; wherein the processor unit is adapted to create a log (200) in the memory prior to running the virtual machine in said first operating mode; the cache controller is adapted to transfer a modified cache line from the cache to the memory; and write only the memory address of the transferred modified cache line in the log; and the processor unit is further adapted to update a further image of the virtual machine in a different memory location, e.g. on another computer system, by retrieving the memory addresses stored in the log, retrieve the modified cache lines from the memory addresses and update the further image with said modifications.Type: GrantFiled: February 27, 2013Date of Patent: June 2, 2015Assignee: International Business Machines CorporationInventors: Guy L. Guthrie, Naresh Nayar, Geraint North, William J. Starke
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Patent number: 9043575Abstract: A partition manager relocates a logical partition from a primary shared processor pool to a secondary shared processor pool in response to a predetermined condition, such as a hardware failure. The relocated logical partition is allocated a smaller quantity of processing units from the secondary pool than it was allocated from the primary pool. A quantity of processing units reserved for a second logical partition is identified in the secondary shared processor pool, and a portion of those reserved processing units are allocated to the relocated logical partition. The reserved processing units may be redistributed among multiple relocated logical partitions.Type: GrantFiled: March 15, 2013Date of Patent: May 26, 2015Assignee: International Business Machines CorporationInventors: Naresh Nayar, Geraint North, Bryan M. Logan
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Publication number: 20150143055Abstract: A computer system comprises a processor unit arranged to run a hypervisor running one or more virtual machines, a cache connected to the processor unit and comprising a plurality of cache rows, each cache row comprising a memory address, a cache line and an image modification flag and a memory connected to the cache and arranged to store an image of at least one virtual machine. The processor unit is arranged to define a log in the memory and the cache further comprises a cache controller arranged to set the image modification flag for a cache line modified by a virtual machine being backed up, periodically check the image modification flags and write only the memory address of the flagged cache rows in the defined log. The processor unit is further arranged to monitor the free space available in the defined log and to trigger an interrupt if the free space available falls below a specific amount.Type: ApplicationFiled: November 20, 2014Publication date: May 21, 2015Inventors: Guy L. Guthrie, Naresh Nayar, Geraint North, William J. Starke, Albert J. Van Norstrand, JR.
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Patent number: 9032180Abstract: A primary processing unit entitlement is determined for a logical partition. A smaller secondary processing unit entitlement is also determined. A partition manager allocates primary processing units to the logical partition from a primary shared processor pool, and the logical partition is activated. The secondary processing units are reserved for the logical partition from a secondary shared processor pool, and the logical partition can be relocated to the secondary shared processor pool in response to a condition such as a hardware failure. The logical partition can continue to process its workload with the fewer processor resources, and can be restored to the primary processing unit entitlement.Type: GrantFiled: March 15, 2013Date of Patent: May 12, 2015Assignee: International Business Machines CorporationInventors: Naresh Nayar, Geraint North, Bryan M. Logan
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Patent number: 9027021Abstract: A mechanism is provided in a logically partitioned data processing system for controlling depth and latency of exit of a virtual processor's idle state. A virtualization layer generates a cede latency setting information (CLSI) data. Responsive to booting a logical partition, the virtualization layer communicates the CLSI data to an operating system (OS) of the logical partition. The OS determines, based on the CLSI data, a particular idle state of a virtual processor under a control of the OS. Responsive to the OS calling the virtualization layer, the OS communicates the particular idle state of the virtual processor to the virtualization layer for assigning the particular idle state and wake-up characteristics to the virtual processor.Type: GrantFiled: April 12, 2012Date of Patent: May 5, 2015Assignee: International Business Machines CorporationInventors: Richard L. Arndt, Naresh Nayar, Christopher Francois, Karthick Rajamani, Freeman L. Rawson, III, Randal C. Swanberg
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Patent number: 8990816Abstract: Techniques for simulating exclusive use of a processor core amongst multiple logical partitions (LPARs) include providing hardware thread-dependent status information in response to access requests by the LPARs that is reflective of exclusive use of the processor by the LPAR accessing the hardware thread-dependent information. The information returned in response to the access requests is transformed if the requestor is a program executing at a privilege level lower than the hypervisor privilege level, so that each logical partition views the processor as though it has exclusive use of the processor. The techniques may be implemented by a logical circuit block within the processor core that transforms the hardware thread-specific information to a logical representation of the hardware thread-specific information or the transformation may be performed by program instructions of an interrupt handler that traps access to the physical register containing the information.Type: GrantFiled: April 20, 2012Date of Patent: March 24, 2015Assignee: International Business Machines CorporationInventors: Giles R. Frazier, Bruce Mealy, Naresh Nayar
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Patent number: 8862859Abstract: An apparatus, system, and method are disclosed for improved support of MPS segments in a microprocessor. The virtual address is used to generate possible TLB index values for each of the supported page sizes of the MPS segment associated with the virtual address. The possible TLB index values may be a hash generated using the virtual address and one of the supported page sizes. The TLB is searched for actual TLB index values that match the possible TLB index values calculated using the different supported page sizes. TLB entries associated with those actual TLB index values are checked to determine whether any TLB entry is associated with the virtual address. If no match is found, the real address is retrieved from the PT. The actual page size in the PT is used to generate an actual TLB index value for the virtual address and the TLB entry is inserted into the TLB.Type: GrantFiled: May 7, 2010Date of Patent: October 14, 2014Assignee: International Business Machines CorporationInventors: Miles R. Dooley, Sundeep Chadha, Naresh Nayar, Randal C. Swanberg
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Publication number: 20140281287Abstract: A primary processing unit entitlement is determined for a logical partition. A smaller secondary processing unit entitlement is also determined. A partition manager allocates primary processing units to the logical partition from a primary shared processor pool, and the logical partition is activated. The secondary processing units are reserved for the logical partition from a secondary shared processor pool, and the logical partition can be relocated to the secondary shared processor pool in response to a condition such as a hardware failure. The logical partition can continue to process its workload with the fewer processor resources, and can be restored to the primary processing unit entitlement.Type: ApplicationFiled: March 15, 2013Publication date: September 18, 2014Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Naresh Nayar, Geraint North, Bryan M. Logan
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Publication number: 20140281289Abstract: Profile properties in a partition profile are user-configurable through a management entity such as a management console. A partition manager calculates a secondary processing unit entitlement for a logical partition based in part on a secondary processing unit mode property in the partition profile. The secondary processing unit entitlement may be smaller than a primary processing unit entitlement for the logical partition. The partition manager reserves processing units from a secondary shared processor pool equal to the logical partition's secondary entitlement for the logical partition. The primary and secondary processing unit entitlements may be stored in primary and secondary configuration data structures associated with the logical partition. The partition manager may relocate the logical partition to the secondary shared processor pool in response to a predetermined condition.Type: ApplicationFiled: March 15, 2013Publication date: September 18, 2014Inventors: Naresh Nayar, Geraint North, Bryan M. Logan
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Publication number: 20140281117Abstract: Memory page de-duplication in a computer system that includes a plurality of virtual machine partitions managed by a hypervisor, where each virtual machine is assigned a different dedicated memory partition, may include: identifying, by the hypervisor, a plurality of identical memory pages in memory of one or more dedicated memory partitions; assigning, by the hypervisor, one of the identical memory pages as a master page; mapping, for each virtual machine having an identical memory page, each of the identical memory pages to the master page; and directing, by the hypervisor, reads of the memory page to the master page.Type: ApplicationFiled: March 14, 2013Publication date: September 18, 2014Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: David A. Hepkin, Stuart Z. Jacobs, Bruce Mealey, Naresh Nayar, Wade B. Ouren
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Publication number: 20140281347Abstract: Profile properties in a partition profile are user-configurable through a management entity such as a management console. A partition manager calculates a secondary processing unit entitlement for a logical partition based in part on a secondary processing unit mode property in the partition profile. The secondary processing unit entitlement may be smaller than a primary processing unit entitlement for the logical partition. The partition manager reserves processing units from a secondary shared processor pool equal to the logical partition's secondary entitlement for the logical partition. The primary and secondary processing unit entitlements may be stored in primary and secondary configuration data structures associated with the logical partition. The partition manager may relocate the logical partition to the secondary shared processor pool in response to a predetermined condition.Type: ApplicationFiled: March 15, 2013Publication date: September 18, 2014Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Naresh Nayar, Geraint North, Bryan M. Logan