Patents by Inventor Narihito OTA

Narihito OTA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10418295
    Abstract: A power module includes an insulated circuit board, a semiconductor element, a first buffer plate, and first and second joining materials. The semiconductor element is disposed on a side of one main surface of the insulated circuit board. The first buffer plate is disposed between the insulated circuit board and the semiconductor element. The first joining material is divided into a plurality of portions in a plan view. The first buffer plate is higher in coefficient of linear expansion than the semiconductor element and lower in coefficient of linear expansion than the insulated circuit board. The first buffer plate is lower in Young's modulus than the semiconductor element.
    Type: Grant
    Filed: November 4, 2016
    Date of Patent: September 17, 2019
    Assignee: Mitsubishi Electric Corporation
    Inventors: Yoshinori Yokoyama, Shinnosuke Soda, Narihito Ota, Kazuyasu Nishikawa, Akihisa Fukumoto
  • Publication number: 20180366383
    Abstract: A power module includes an insulated circuit board, a semiconductor element, a first buffer plate, and first and second joining materials. The semiconductor element is disposed on a side of one main surface of the insulated circuit board. The first buffer plate is disposed between the insulated circuit board and the semiconductor element. The first joining material is divided into a plurality of portions in a plan view. The first buffer plate is higher in coefficient of linear expansion than the semiconductor element and lower in coefficient of linear expansion than the insulated circuit board. The first buffer plate is lower in Young's modulus than the semiconductor element.
    Type: Application
    Filed: November 4, 2016
    Publication date: December 20, 2018
    Applicant: Mitsubishi Electric Corporation
    Inventors: Yoshinori YOKOYAMA, Shinnosuke SODA, Narihito OTA, Kazuyasu NISHIKAWA, Akihisa FUKUMOTO
  • Patent number: 8835333
    Abstract: A heat treatment method of the present invention includes mounting a plurality of semiconductor wafers upright on a treatment boat in parallel to each other, inserting the treatment boat in a space above an injector located in a tube to be oriented to plane surfaces of the semiconductor wafers in parallel to an extending direction of the tube, and heating the tube while continuously supplying source gas into the tube through openings of the injector.
    Type: Grant
    Filed: November 27, 2012
    Date of Patent: September 16, 2014
    Assignee: Mitsubishi Electric Corporation
    Inventors: Narihito Ota, Kunihiko Nishimura
  • Publication number: 20130143348
    Abstract: A heat treatment method of the present invention includes mounting a plurality of semiconductor wafers upright on a treatment boat in parallel to each other, inserting the treatment boat in a space above an injector located in a tube to be oriented to plane surfaces of the semiconductor wafers in parallel to an extending direction of the tube, and heating the tube while continuously supplying source gas into the tube through openings of the injector.
    Type: Application
    Filed: November 27, 2012
    Publication date: June 6, 2013
    Inventors: Narihito OTA, Kunihiko Nishimura