Abstract: A field emission cold cathode element designed with the objects of enabling control of overcurrents that arise at times of discharge without adding a power source or complicating the operating circuits, realizing high-frequency operation and lower power consumption without giving rise to short-circuit damage due to discharge breakdown, and moreover, suppressing increases in element temperature; wherein an n-type region underlying emitters is divided between three n-type semiconductor regions: a first n-type semiconductor region, a second n-type semiconductor region and a third n-type semiconductor region.

Abstract: A field emission cold cathode comprises an n-type silicon substrate (1), a plurality of sharp-pointed emitter cones (2) formed on the n-type silicon substrate (1), and a buried insulator layer (3) formed in the n-type silicon substrate (1) to surround each of underlying regions right under each emitter cone (2). An insulator layer (4) is formed on the n-type silicon substrate (1) and has a plurality of insulator holes so as to surround each emitter cone (2). A gate electrode (5) is formed on the insulator layer (4) and has a plurality of gate holes for extracting electrons from the emitter cones (2).

Abstract: A field emission type cold cathode device has a substrate whose upper surface is conductive, an insulating layer deposited on the conductive surface, a conductive gate layer, and a conical emitter electrode having a sharp apex formed in an opening in the insulating layer and the gate electrode. The insulating layer includes a first insulating film and a second insulating film. The insulating layer in the opening has an exposed surface arranged so that electrons emitted from near an end portion of the first insulating film are kept away from exposed surfaces of the insulating layer. In one form, the exposed surface of the first insulating film is disposed at a level lower than an unexposed surface of the first insulating film thus forming a recess. In another form, the second insulating film exposed in the opening is recessed relative to the first insulating film exposed in the opening.

Abstract: A semiconductor memory of a junction destruction type includes programmable read-only memory (PROM) elements arranged in the form of a matrix on a substrate, bit lines connected to emitter regions of the PROM elements, and word lines connected to collector regions of the PROM elements, wherein the emitter regions of the PROM elements have a circular shape. Emitter regions have an opposite type of conductivity to that of the substrate. The bit lines are commonly connected to the emitter regions formed in the collector regions, respectively, to thereby increase density of the memory device.