Abstract: A package includes a storage portion that stores an object to be stored, and a buffer portion that reduces a gap generated between the object to be stored and the storage portion. The storage portion includes a bottom and a lid facing the bottom, and the buffer portion includes a base facing the object to be stored in a stacking direction from the bottom toward the lid, a first fold, and a space adjusting portion connected to the base at the first fold. The space adjusting portion includes an adjusting region extending in the stacking direction, a plurality of second folds distributed in a first direction intersecting the first fold, and a contact region connected to the adjusting region at one of the plurality of second folds.

Abstract: A package includes a storage portion that stores an object to be stored, and a buffer portion that reduces a gap generated between the object to be stored and the storage portion. The storage portion includes a bottom and a lid facing the bottom, and the buffer portion includes a base facing the object to be stored in a stacking direction from the bottom toward the lid, a first fold, and a space adjusting portion connected to the base at the first fold. The space adjusting portion includes an adjusting region extending in the stacking direction, a plurality of second folds distributed in a first direction intersecting the first fold, and a contact region connected to the adjusting region at one of the plurality of second folds.

Abstract: A multilayer ceramic capacitor has an element body formed by alternately laminating a plurality of dielectric layers and a plurality of inner electrodes. On a substrate having a mounting surface provided with at least two lands, the multilayer ceramic capacitor is mounted such that the inner electrodes are parallel to the mounting surface. A multilayer ceramic capacitor mounting structure satisfies Tf/T>0.1 and 300??r?2800, where T is the height of the multilayer ceramic capacitor, Tf is the outer covering thickness of the element body, and ?r is the relative permittivity of the dielectric layers, and 0.6?Wp/W?1.0, where W is the width of the multilayer ceramic capacitor, and Wp is the size of the land in a direction corresponding to the width of the multilayer ceramic capacitor.

Abstract: An EL element 1 comprises EL functional layers 6, 10 comprising Ga2O3:Eu between a thick film insulator layer 16 and an upper electrode 12 provided on a substrate 2 on which a lower electrode 4 was formed and a light-emitting layer 8 comprising MgGa2O4 formed therebetween. The EL functional layers 6, 10 have the dual functions of insulating layers and electron doping layers. Due to this, the EL element 1 has a low drive voltage and high light-emitting brightness, and the structure of the EL element is simplified.

Abstract: A multilayer ceramic capacitor has an element body formed by alternately laminating a plurality of dielectric layers and a plurality of inner electrodes. On a substrate having a mounting surface provided with at least two lands, the multilayer ceramic capacitor is mounted such that the inner electrodes are parallel to the mounting surface. A multilayer ceramic capacitor mounting structure satisfies Tf/T>0.1 and 300??r?2800, where T is the height of the multilayer ceramic capacitor, Tf is the outer covering thickness of the element body, and ?r is the relative permittivity of the dielectric layers, and 0.6?Wp/W?1.0, where W is the width of the multilayer ceramic capacitor, and Wp is the size of the land in a direction corresponding to the width of the multilayer ceramic capacitor.

Abstract: A method for mounting a chip component includes the steps of: flattening a solder deposit adhering onto a land terminal of a circuit board; forming grooves on the solder deposit simultaneously with or after flattening the solder deposit; coating the solder deposit with a flux; and placing a chip component on the solder deposit with the flux interposed therebetween.

Abstract: A sputtering target for fluorescent thin-film formation comprising a matrix material and a luminescent center material, wherein said matrix material has a chemical composition represented by the following formula (1), and simultaneously satisfies conditions represented by the following inequalities (2) to (5). MIIvAxByOzSw ??(1) 0.05?v/x?5 ??(2) 1?y/x?6 ??(3) 0.01?z/(z+w)?0.85 ??(4) 0.6?(v+x+3y/2)/(z+w)?1.5 ??(5) wherein MII represents one or more elements selected from the group consisting of Zn, Cd and Hg, A represents one or more elements selected from the group consisting of Mg, Ca, Sr, Ba and rare earth elements, B represents one or more elements selected from the group consisting of Al, Ga and In, and v, x, y, z and w each represent numerical values satisfying the conditions specified in the inequalities (2) to (5).

Abstract: A method for mounting a chip component includes the steps of: flattening a solder deposit adhering onto a land terminal of a circuit board; forming grooves on the solder deposit simultaneously with or after flattening the solder deposit; coating the solder deposit with a flux; and placing a chip component on the solder deposit with the flux interposed therebetween.

Abstract: An EL element 1 comprises EL functional layers 6, 10 comprising Ga2O3:Eu between a thick film insulator layer 16 and an upper electrode 12 provided on a substrate 2 on which a lower electrode 4 was formed and a light-emitting layer 8 comprising MgGa2O4 formed therebetween. The EL functional layers 6, 10 have the dual functions of insulating layers and electron doping layers. Due to this, the EL element 1 has a low drive voltage and high light-emitting brightness, and the structure of the EL element is simplified.

Abstract: A sputtering target for fluorescent thin-film formation comprising a matrix material and a luminescent center material, wherein said matrix material has a chemical composition represented by the following formula (1), and simultaneously satisfies conditions represented by the following inequalities (2) to (5). MIIvAxByOzSw ??(1) 0.05?v/x?5 ??(2) 1?y/x?6 ??(3) 0.01?z/(z+w)?0.85 ??(4) 0.6?(v+x+3y/2)/(z+w)?1.5 ??(5) wherein MII represents one or more elements selected from the group consisting of Zn, Cd and Hg, A represents one or more elements selected from the group consisting of Mg, Ca, Sr, Ba and rare earth elements, B represents one or more elements selected from the group consisting of Al, Ga and In, and v, x, y, z and w each represent numerical values satisfying the conditions specified in the inequalities (2) to (5).

Abstract: The present invention aims at realizing a phosphor thin film having a high luminance with a low emission threshold voltage, and an EL element comprising the same. The EL element of the present invention comprises a substrate, and a lower electrode, a lower buffer thin film containing a sulfide such as ZnS, a phosphor thin film containing an oxide such as a gallate as a matrix material, an upper buffer thin film containing a sulfide such as ZnS, and an upper electrode which are successively laminated on the substrate.

Abstract: The present invention aims at realizing a phosphor thin film having a high luminance with a low emission threshold voltage, and an EL element comprising the same. The EL element of the present invention comprises a substrate, and a lower electrode, a lower buffer thin film containing a sulfide such as ZnS, a phosphor thin film containing an oxide such as a gallate as a matrix material, an upper buffer thin film containing a sulfide such as ZnS, and an upper electrode which are successively laminated on the substrate.