Abstract: Methods and apparatus to determine and implement multidimensional network topologies are disclosed. An example method disclosed herein comprises receiving an input parameter for determining a multidimensional network topology for a network interconnecting a plurality of devices, and determining a set of multidimensional network topologies, each multidimensional network topology of the set comprising a respective plurality of nodes to interconnect the plurality of devices, each node in each multidimensional network topology of the set being fully connected with all neighbor nodes in each dimension of the multidimensional network topology, and each multidimensional network topology of the set satisfying a first constraint based on the input parameter.

Abstract: Methods, apparatus, and articles of manufacture to manage memory are disclosed. An example method includes mapping a cache memory to a random access memory, incrementing a counter in response to a data write to a cache line of the cache memory, decrementing the counter in response to a write-back of the data from the cache line, and committing the data to the RAM when the counter is equal to a threshold.

Abstract: Optical interconnect fabrics and optical switches are disclosed. In one aspect, an optical interconnect fabric comprises one or more bundles of optical broadcast buses. Each optical broadcast bus is optically coupled at one end to a node and configured to transmit optical signals generated by the node. The optical fabric also includes a number of optical tap arrays distributed along each bundle of optical broadcast buses. Each optical tap array is configured to divert a portion of the optical power associated with the optical signals carried by a bundle of optical broadcast buses to one of the nodes.

Abstract: Methods and systems are provided that prevent buffer overflow in multibus systems. In one aspect, a method for controlling the flow of data in a multibus system includes, for each node having an associated broadcast bus in the multibus system, generating status information regarding available data storage space of each receive buffer of the node. The method includes broadcasting the status information to the other nodes connected to the broadcast bus and collecting status information regarding the available storage space of receive buffers of the other nodes connected to the broadcast bus. The method also includes determining whether or not to send data from the node to at least one of the other nodes over the broadcast bus based on the collected status information.

Abstract: Example methods, apparatus, and articles of manufacture to access data are disclosed. A disclosed example method involves generating a key-value association table in a non-volatile memory to store physical addresses of a data cache storing data previously retrieved from a data structure. The example method also involves storing recovery metadata in the non-volatile memory. The recovery metadata includes a first address of the key-value association table in the non-volatile memory. In addition, following a re-boot process, the locations of the key-value association table and the data cache are retrieved using the recovery metadata without needing to access the data structure to re-generate the key-value association table and the data cache.

Abstract: Various embodiments of the present invention are directed to systems and methods for all optical distributed arbitration for computer system components (1801-1804) communicatively coupled via a photonic interconnect in a computer system device. The embodiments of the optical arbitration in the computer system provides arbitration schemes with fixed priority (2000) and non-fixed priority (1830, 2200). The non-fixed priority scheme embodiments can provide fairness in arbitration. In some embodiments, delivery of light power and arbitration are combined (1830, 2001).

Abstract: A circuit switched optical interconnection fabric includes a first hollow metal waveguide and a second hollow metal waveguide which intersects the first hollow metal waveguide to form an intersection. An optical element within the intersection is configured to selectively direct an optical signal between the first hollow metal waveguide and a second hollow metal waveguide.

Abstract: Various embodiments of the present invention relate to electronically tunable ring resonators. In one embodiment of the present invention, a resonator structure (300,1200) includes an inner resonator disposed on a surface of a substrate, and a phase-change layer (304,1204) covering the resonator. The resonance wavelength of the resonator structure can be selected by applying of a first voltage that changes the effective refractive index of the inner resonator and by applying of a second voltage that changes the effective refractive index of the phase-change layer.

Abstract: Various embodiments of the present invention are directed to arbitration systems and methods. In one embodiment, an arbitration system comprises a loop-shaped arbitration waveguide (602), a loop-shaped hungry waveguide (603), and a loop-shaped broadcast waveguide (604). The arbitration, hungry, and broadcast waveguides optically coupled to a home node and a number of requesting nodes. The arbitration waveguide transmits tokens injected by the home node. A token extracted by a requesting node grants the node access to a resource for the duration or length of the token. The hungry waveguide transmits light injected by the home node. A requesting node in a hungry state extracts the light from the hungry waveguide. The broadcast waveguide transmits light injected by the home node such that the light indicates to requesting nodes not in the hungry state to stop extracting tokens from the arbitration waveguide.

Abstract: Tunable resonator systems and methods for tuning resonator systems are disclosed. In one aspect, a resonator system includes an array of resonators disposed adjacent to a waveguide, at least one temperature sensor located adjacent to the array of resonators, and a resonator control electronically connected to the at least one temperature sensor. Each resonator has a resonance frequency in a resonator frequency comb and channels with frequencies in a channel frequency comb are transmitted in the waveguide. Resonance frequencies in the resonator frequency comb are to be adjusted in response to ambient temperature changes detected by the at least one temperature sensors to align the resonance frequency comb with the channel frequency comb.

Abstract: Described is a switch architecture that combines address management with simplified hardware to implement fast route lookup within network switches such as Ethernet switches. A managed address includes a cluster ID which is shared by all endpoints in a cluster, and a member ID which is unique for each node in the cluster. The switch extracts the cluster ID from a target address for a packet and compares it against at least one cluster ID stored in a cluster identification memory. Responsive to a match, the switch generates a port identification for the packet using a fast lookup table. Responsive to no match, the target address is considered an unmanaged address. In one implementation, a slow lookup table can be used to generate a port identification for the unmanaged address.

Abstract: Methods and apparatus to determine and implement multidimensional network topologies are disclosed. An example method disclosed herein comprises receiving an input parameter for determining a multidimensional network topology for a network interconnecting a plurality of devices, and determining a set of multidimensional network topologies, each multidimensional network topology of the set comprising a respective plurality of nodes to interconnect the plurality of devices, each node in each multidimensional network topology of the set being fully connected with all neighbor nodes in each dimension of the multidimensional network topology, and each multidimensional network topology of the set satisfying a first constraint based on the input parameter.

Abstract: Methods and systems are provided that prevent buffer overflow in multibus systems. In one aspect, a method for controlling the flow of data in a multibus system includes, for each node having an associated broadcast bus in the multibus system, generating status information regarding available data storage space of each receive buffer of the node. The method includes broadcasting the status information to the other nodes connected to the broadcast bus and collecting status information regarding the available storage space of receive buffers of the other nodes connected to the broadcast bus. The method also includes determining whether or not to send data from the node to at least one of the other nodes over the broadcast bus based on the collected status information.

Abstract: Systems and methods are provided for modulating, channels in dense wavelength division multiplexing (“DWDM”) systems. In one aspect, a modulation and wavelength division multiplexing system includes a channel source and a waveguide tree structure disposed on a substrate. The tree structure includes waveguides branching from a root waveguide. The waveguides include two or more terminus waveguides coupled to the channel source. The system also includes one or more modulator arrays disposed on the substrate. Each modulator array is optically coupled to one of the two or more terminus waveguides and is configured to modulate channels injected into a terminus waveguide from the channel source to produce corresponding optical signals that propagate from the terminus waveguide along one or more of the waveguides to the root waveguide.

Abstract: The present invention provides one or more embodiments of an optical interconnect design suitable for providing communication between computer system components in a computer system device. The optical interconnect (100) can be integrated on a chip, and can be used to implement complex chips with a large number of cooperating components.

Abstract: Various embodiments of the present invention are directed to stacked memory modules. In one embodiment of the present invention, a memory module comprises at least one memory-controller layer stacked with at least one memory layer. Fine pitched through vias (e.g., through silicon vias) extend approximately perpendicular to a surface of the at least one memory controller through the stack providing electronic communication between the at least one memory controller and the at least one memory layers. Additionally, the memory-controller layer includes at least one external interface configured to transmit data to and from the memory module. Furthermore, the memory module can include an optical layer. The optical layer can be included in the stack and has a bus waveguide to transmit data to and from the at least one memory controller. The external interface can be an optical external interface which interfaces with the optical layer.

Abstract: Various embodiments of the present invention relate to systems and methods for achieving low-latency, prioritized, distributed optical-base arbitration. In one embodiment, an optical arbitration system (100,1100) comprises a waveguide (102,1102) having a first end and a second end, and a source (104,1104) optically coupled to the first end of the waveguide and configured to input at least one wavelength of light into the waveguide. The system also includes a number of wavelength selective elements (106-109,1106-1109) optically coupled to the waveguide. Each wavelength selective element is capable of extracting a wavelength of light from the waveguide when activated by an electronically coupled node. An arbiter (110,116,120,1112,1116,1120) is optically coupled to the second end of the waveguide and to the waveguide between the source and a wavelength selective element located closest to the source along the waveguide.

Abstract: Various embodiments of the present invention are directed to photonic interconnects that can be used for on-chip as well as off-chip communications between computer system components. In one embodiment of the present invention, a photonic interconnect comprises a plurality of on-chip waveguides. Additionally, the photonic interconnect may include a plurality of off-chip waveguides, and at least one optoelectronic converter. The at least one optoelectronic converter can be photonically coupled to a portion of the plurality of on-chip waveguides, can be photonically coupled to a portion of the plurality of off-chip waveguides, and is in electronic communication with at least one computer system component.

Abstract: Various embodiments of the present invention are directed to photonic interconnects that can be used for on-chip as well as off-chip communications between computer system components. In one embodiment of the present invention, a photonic interconnect comprises a plurality of on-chip waveguides. Additionally, the photonic interconnect may include a plurality of off-chip waveguides, and at least one optoelectronic converter. The at least one optoelectronic converter can be photonically coupled to a portion of the plurality of on-chip waveguides, can be photonically coupled to a portion of the plurality of off-chip waveguides, and is in electronic communication with at least one computer system component.

Abstract: Various embodiments of the present invention are directed to photonic interconnects that can be used for on-chip as well as off-chip communications between computer system components. In one embodiment of the present invention, a photonic interconnect comprises a plurality of on-chip waveguides. Additionally, the photonic interconnect may include a plurality of off-chip waveguides, and at least one optoelectronic converter. The at least one optoelectronic converter can be photonically coupled to a portion of the plurality of on-chip waveguides, can be photonically coupled to a portion of the plurality of off-chip waveguides, and is in electronic communication with at least one computer system component.