Patents by Inventor Naveen Kumar Macha

Naveen Kumar Macha has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10840906
    Abstract: The presently disclosed invention astutely turns the potentially detrimental crosstalk effect in nanocircuitry into an advantage by engineering interference among single lines. In one embodiment, a nanocircuit logic gate within an array of nanocircuitry comprises first and second aggressor metal conductive lines; a victim line; and an inverter coupled to the victim line; wherein the first and second aggressor conductive lines are positioned to induce a signal on the victim line. In another embodiment, a nanocircuit logic gate within an array of nanocircuitry comprises first and second aggressor metal conductive lines; a control aggressor metal conductive line; a victim line; and a first inverter coupled to the victim line; wherein the first and second aggressor conductive lines and the control aggressor conductive line are positioned to induce a signal on the victim line. Further embodiments include complex computational and logic structures based on these efficient logic circuits.
    Type: Grant
    Filed: May 15, 2019
    Date of Patent: November 17, 2020
    Inventors: Mostafizur Rahman, Naveen Kumar Macha
  • Publication number: 20190356315
    Abstract: The presently disclosed invention astutely turns the potentially detrimental crosstalk effect in nanocircuitry into an advantage by engineering interference among single lines. In one embodiment, a nanocircuit logic gate within an array of nanocircuitry comprises first and second aggressor metal conductive lines; a victim line; and an inverter coupled to the victim line; wherein the first and second aggressor conductive lines are positioned to induce a signal on the victim line. In another embodiment, a nanocircuit logic gate within an array of nanocircuitry comprises first and second aggressor metal conductive lines; a control aggressor metal conductive line; a victim line; and a first inverter coupled to the victim line; wherein the first and second aggressor conductive lines and the control aggressor conductive line are positioned to induce a signal on the victim line. Further embodiments include complex computational and logic structures based on these efficient logic circuits.
    Type: Application
    Filed: May 15, 2019
    Publication date: November 21, 2019
    Inventors: Mostafizur Rahman, Naveen Kumar Macha