Patents by Inventor Navin Kumar Dayani

Navin Kumar Dayani has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Input/output cell design for thin gate oxide transistors with restricted poly gate orientation
    Patent number: 9075947
    Abstract: An input/output circuit layout has a first section in which first transistors having a thicker gate oxide are located and a second section in which second transistors having a thinner gate oxide are located. Due to process technology constraints, the gates of all of the second transistors are oriented in a single common direction. The second section has a perimeter having a square shape including a first edge and a second edge adjacent to the first edge. First connection pins coupled to the second transistors are provided with an orientation that extends inwardly from and perpendicular to the first edge. Second connection pins coupled to the second transistors are provided with an orientation that extends inwardly from and perpendicular to said second edge. The square shape and presence of pins on adjacent first and second edges permits rotation of the second section to fit within different orientations of the layout.
    Type: Grant
    Filed: June 6, 2013
    Date of Patent: July 7, 2015
    Assignees: STMicroelectronics International N.V., STMicroelectronics (Crolles 2) SAS
    Inventors: Manoj Kumar, Jean Guillorit, Navin Kumar Dayani
  • INPUT/OUTPUT CELL DESIGN FOR THIN GATE OXIDE TRANSISTORS WITH RESTRICTED POLY GATE ORIENTATION
    Publication number: 20140365987
    Abstract: An input/output circuit layout has a first section in which first transistors having a thicker gate oxide are located and a second section in which second transistors having a thinner gate oxide are located. Due to process technology constraints, the gates of all of the second transistors are oriented in a single common direction. The second section has a perimeter having a square shape including a first edge and a second edge adjacent to the first edge. First connection pins coupled to the second transistors are provided with an orientation that extends inwardly from and perpendicular to the first edge. Second connection pins coupled to the second transistors are provided with an orientation that extends inwardly from and perpendicular to said second edge. The square shape and presence of pins on adjacent first and second edges permits rotation of the second section to fit within different orientations of the layout.
    Type: Application
    Filed: June 6, 2013
    Publication date: December 11, 2014
    Inventors: Manoj Kumar, Jean Guillorit, Navin Kumar Dayani