Abstract: Systems and methods for providing a buffer between a memory controller and memory devices in high performance solid state devices. Some embodiments include a solid state device system. The solid state device system can include a memory controller electrically coupled to a channel, where the memory controller is configured to select one of a plurality of flash memory devices and, in response to the selection, provide a control signal. The solid state device system can also include a buffer having a first tri-state logic gate coupled to the channel, where the buffer is configured to receive the control signal from the memory controller and, in response, to couple the channel to the selected one of the plurality of flash memory devices via the first tri-state logic gate and to decouple the remainder of the plurality of flash memory devices from the channel.

Abstract: A transistor according to the invention for simultaneously providing at least two current-voltage characteristics includes a base, a collector, and an emitter. At least one of the base, collector, and emitter includes a first layer grown using molecular beam epitaxy (MBE). The first layer includes a first strip having a first doping characteristic created using focused ion beam processing. A second strip has a second doping characteristic created by focused ion beam processing. A middle section of undoped material is located between the first and second strips. A resonant tunneling junction is grown on the first layer using MBE and includes a plurality of layers.

Abstract: A family of logic circuits using nonhysteretic superconducting quantum interference devices (SQUIDs) connected together to perform various functions using a common operating principle. Each circuit has an output line, first and second power supply lines having first and second voltage states, and input lines that can have one of the two voltage states. A pull-up circuit, having at least one SQUID, is connected between the output line and the first power supply line, and the input lines are coupled to the pull-up circuit in such a manner as to pull the output line to the first voltage state only if the input lines conform with a selected combination of voltage states. A pull-down circuit, also having at least one SQUID, is connected between the output line and the second power supply line, to pull the output line to the second voltage state only when input lines do not conform with the selected combination of voltage states.