Abstract: A method for treating a super-hard structure, the method including heating the super-hard structure to a treatment temperature of at least 500 degrees centigrade and cooling the super-hard structure from the treatment temperature to a temperature of less than 200 degrees centigrade at a mean cooling rate of at least 1 degree centigrade per second and at most 100 degrees centigrade per second to provide a treated super-hard structure. A PCBN structure produced by the method may have flexural strength of at least 650 MPa.

Abstract: A method for treating a super-hard structure, the method including heating the super-hard structure to a treatment temperature of at least 500 degrees centigrade and cooling the super-hard structure from the treatment temperature to a temperature of less than 200 degrees centigrade at a mean cooling rate of at least 1 degree centigrade per second and at most 100 degrees centigrade per second to provide a treated super-hard structure. A PCBN structure produced by the method may have flexural strength of at least 650 MPa.

Abstract: A multi-terminal electromechanical nanoscopic switching device which may be used as a memory device, a pass gate, a transmission gate, or a multiplexer, among other things.

Abstract: Reconfigurable electronic structures and circuits using programmable, non-volatile memory elements. The programmable, non-volatile memory elements may perform the functions of storage and/or a switch to produce components such as crossbars, multiplexers, look-up tables (LUTs) and other logic circuits used in programmable logic structures (e.g., (FPGAs)). The programmable, non-volatile memory elements comprise one or more structures based on Phase Change Memory, Programmable Metallization, Carbon Nano-Electromechanical (CNT-NEM), or Metal Nano-Electromechanical device technologies.

Abstract: Content-addressable memory (CAM) cells comprised of phase change material devices (PCMDs), including PCMD-based binary CAM cells (PCMD-based BCAM cells), PCMD-based ternary CAM cells (PCMD-based TCAM cells), and PCMD-based universal CAM cells (PCMD-based UCAM cells). The PCMDs of the various PCMD-based CAM cells are configured and programmed in a manner that allows a logic “0” or a logic “1” to be stored by the CAM cell. The logic value stored by a given PCMD-based CAM cell depends on the program states of the PCMDs. A program state of a PCMD is determined by whether the phase change material of the PCMD has been allowed to solidify to a crystalline, low-resistance state during a programming operation, or whether the phase change material of the PCMD is forced to solidify to an amorphous, high-resistance state during the programming operation.

Abstract: Reconfigurable electronic structures and circuits using programmable, non-volatile memory elements. The programmable, non-volatile memory elements may perform the functions of storage and/or a switch to produce components such as crossbars, multiplexers, look-up tables (LUTs) and other logic circuits used in programmable logic structures (e.g., (FPGAs)). The programmable, non-volatile memory elements comprise one or more structures based on Phase Change Memory, Programmable Metallization, Carbon Nano-Electromechanical (CNT-NEM), or Metal Nano-Electromechanical device technologies.

Abstract: Reconfigurable electronic structures and circuits using programmable, non-volatile memory elements. The programmable, non-volatile memory elements may perform the functions of storage and/or a switch to produce components such as crossbars, multiplexers, look-up tables (LUTs) and other logic circuits used in programmable logic structures (e.g., (FPGAs)). The programmable, non-volatile memory elements comprise one or more structures based on Phase Change Memory, Programmable Metallization, Carbon Nano-Electromechanical (CNT-NEM), or Metal Nano-Electromechanical device technologies.

Abstract: The present invention provides a method of detecting an endpoint of the removal of a material from a microelectronics substrate. This embodiment includes removing at least a portion of an overlying material 210 located over a luminescent layer 215 that is located over a microelectronics substrate 220 and using luminescence emission 240 to determine an endpoint of the removal of the overlying material 210.

Abstract: The present invention provides a system (100) for conditioning multi-component slurries utilized in chemical mechanical polishing (CMP) of semiconductor wafers (140). The system provides a first slurry component (108), and a second slurry component (120). A conditioning component (102) has first and second inlets, and an outlet operatively coupled to a dispensing system (138). First and second flow control components (116, 126) are operably intercoupled between the first and second inlets and the first and second slurry components, respectively. The system further provides a megasonic energy source (106), adapted to generate an energy field (118) across the conditioning component. A conveyance component (114) conducts the slurry components from the inlets through the energy field, and delivers a final mixture (136) of multi-component slurry to the outlet.

Abstract: The present invention provides a system (100) for conditioning multi-component slurries utilized in chemical mechanical polishing (CMP) of semiconductor wafers (140). The system provides a first slurry component (108), and a second slurry component (120). A conditioning component (102) has first and second inlets, and an outlet operatively coupled to a dispensing system (138). First and second flow control components (116, 126) are operably intercoupled between the first and second inlets and the first and second slurry components, respectively. The system further provides a megasonic energy source (106), adapted to generate an energy field (118) across the conditioning component. A conveyance component (114) conducts the slurry components from the inlets through the energy field, and delivers a final mixture (136) of multi-component slurry to the outlet.

Abstract: A business logic server for forming priority data structures includes a memory and a processing module. The processing module communicatively coupled to the memory. The processing module receives at least one transmission rule and a data download and stores the at least one transmission rule and the data download in the memory. The processing module is programmed to format the at least one transmission rule into at least one priority data structure and stores the priority data structure in the memory. The processing module is programmed to create an input file in the memory and format the data download into the input file. The processing module transmits the input file and the at least one priority data structure from the memory to a network logic server.