Abstract: A system includes radio devices where radio links between the devices are configured by bringing the radio devices in close proximity for a few seconds. A proximity detector of a radio device detects the proximity of another radio device and an automatic registration process begins to configure a link between the devices. One-to-one or one-to-many links may be established. Links may be cancelled by repeating the process. The devices may include an indicator to indicate establishment of the link.

Abstract: A system includes radio devices where radio links between the devices are configured by bringing the radio devices in close proximity for a few seconds. A proximity detector of a radio device detects the proximity of another radio device and an automatic registration process begins to configure a link between the devices. One-to-one or one-to-many links may be established. Links may be cancelled by repeating the process. The devices may include an indicator to indicate establishment of the link.

Abstract: A system includes radio devices where radio links between the devices are configured by bringing the radio devices in close proximity with hosts for a few seconds. A proximity detector in the device detects the proximity and an automatic registration process begins to configure a link between the device and nearby host. One-to-one or one-to-many links may be established. Links may be cancelled by repeating the process. The devices may include an indicator to indicate establishment of the link.

Abstract: An active matrix electroluminescent display device has an array of current—driven electroluminescent display elements (20), for example comprising organic electroluminescent material, whose operations are each controlled by an associated switching means (10) to which a drive signal for determining a desired light output is supplied in a respective address period and which is arranged to drive the display element according to the drive signal following the address period. Each switching means comprises a current mirror circuit (24, 25, 30, 32) which samples and stores the drive signal with one transistor (24) of the circuit controlling the drive current through the display element (20) and having its gate connected to a storage capacitance (30) on which a voltage determined by the drive signal is stored. Through the use of current mirror circuits improved uniformity of light outputs from the display elements in the array is obtained.

Abstract: A network for locating a wireless tag comprises a plurality of wireless nodes. The nodes are not connected together by a wired network. Each node is included in a floor tile for installation inside a building and configured to be wirelessly connectable to at least one other node. When the floor tiles are installed, the plurality of nodes form a mesh or grid and provide overlapping wireless coverage for locating the tag by reference to the mesh.

Abstract: A method of indicating the location of a relatively mobile object, comprising the steps of: (a) generating a first signal that is characteristic of a first, relatively immobile object; (b) transmitting the first signal from the first relatively immobile object; (c) detecting the first signal at a receiver; (d) generating a second signal that is characteristic of a second, relatively immobile object; (e) transmitting the second signal from the second, relatively immobile object; (f) detecting the second signal at a receiver; (g) generating a third signal that is characteristic of the relatively immobile object; (h) detecting the third signal at a receiver; (i) operating a processing device operatively connected to the receiver using signal time-of-flight (t-o-f) data and/or received signal strength information (RSSI) to establish the distance of the relatively mobile object respectively from the first and second relatively immobile objects; and (j) generating a signal indicating whether the relatively mobile o

Abstract: A display has circuitry (50) which generates all possible pixel drive signal levels on separate signal level lines. A buffer (54) is associated with each signal level line. The outputs of the buffers are selectably switchable onto the columns. The signal levels for each column are stored in a memory (72) and the buffers are controlled in dependence on the stored signal levels. The response of the buffers is heavily dependent on the output load, and there is a very large variation in the output load of the buffers (54), as a function of the number of columns to which the buffer output is to be provided. The buffers are controlled in dependence on stored signal levels to ensure stability of the buffers for any output load.

Abstract: A cholesteric liquid crystal display has pixel address circuits (84) with an input (12) for receiving a data signal and a plurality of outputs, wherein each output is for applying a pixel drive signal to a respective portion of the liquid crystal material (20), and wherein the pixel drive signal for each output is independently switchable by the pixel address circuit to each output. This provides spatially-separated sub-pixels, and a number of the sub-pixels can be addressed in order to provide a grey scale output for each pixel. Each pixel drive signal can however be a two-level digital signal.

Abstract: A display has circuitry (50) which generates all possible pixel drive signal levels on separate signal level lines. A buffer (54) is associated with each signal level line. The outputs of the buffers are selectably switchable onto the columns. The signal levels for each column are stored in a memory (72) and the buffers are controlled in dependence on the stored signal levels. The response of the buffers is heavily dependent on the output load, and there is a very large variation in the output load of the buffers (54), as a function of the number of columns to which the buffer output is to be provided. The buffers are controlled in dependence on stored signal levels to ensure stability of the buffers for any output load.

Abstract: A multiplexer circuit is disclosed for switching a selected one of a plurality of current inputs carried by respective input lines (2;101) to a common output. The circuit comprises, for each input line, a diode clamp (5;104) and isolation means (10;109) provided between each input line and the common terminal The diode clamp (5;104) is operable in a first mode in which voltages are applied to the clamp terminals such that the diodes (8,9;107,108) of the diode clamp are forward biased and hold the input line (2;101) at a first voltage which prevents the passage of current from the input line to the common output, and a second mode in which the voltages are applied to the clamp terminals such that the diodes of the diode clamp are reverse biased and the passage of the current from the input line to the common output is allowed. Only two connections, for the diode clamp, are needed to control the switching of the current input, and the switch introduces no current offset to the output.

Abstract: A multiplexer circuit is disclosed for switching a selected one of a plurality of current inputs carried by respective input lines (2;101) to a common output. The circuit comprises, for each input line, a diode clamp (5;104) and isolation means (10;109) provided between each input line and the common terminal The diode clamp (5;104) is operable in a first mode in which voltages are applied to the clamp terminals such that the diodes (8,9;107,108) of the diode clamp are forward biased and hold the input line (2;101) at a first voltage which prevents the passage of current from the input line to the common output, and a second mode in which the voltages are applied to the clamp terminals such that the diodes of the diode clamp are reverse biased and the passage of the current from the input line to the common output is allowed. Only two connections, for the diode clamp, are needed to control the switching of the current input, and the switch introduces no current offset to the output.

Abstract: A display has circuitry (50) which generates all possible pixel drive signal levels on separate signal level lines. A buffer (54) is associated with each signal level line. The outputs of the buffers are selectably switchable onto the columns. The signal levels for each column are stored in a memory (72) and the buffers are controlled in dependence on the stored signal levels. The response of the buffers is heavily dependent on the output load, and there is a very large variation in the output load of the buffers (54), as a function of the number of columns to which the buffer output is to be provided. The buffers are controlled in dependence on stored signal levels to ensure stability of the buffers for any output load.

Abstract: A display uses column address circuitry having a plurality of multiplexing switching arrangements (50), each of which is associated with two buffers (46a;46b) for providing selected pixel drive signals. The two buffers provide respective pixel drive signals simultaneously to two adjacent columns, such that the pixel drive signal for one column starts before the end of the pixel drive signal for the column driven previously, and ends after the end of the pixel drive signal for the column driven previously. This enables a reduction in the number of buffers required and reduces the cross talk between column signals for adjacent columns within the group of columns shared by each multiplexing arrangement. This is achieved by ensuring that any capacitive coupling between first and second columns is charged to a static level before the signal on one of the columns is switched off.

Abstract: A bistable chiral nematic liquid crystal display has pixel address circuits which comprise a first switching device (14) for switching a supply voltage to the remainder of the pixel address circuit and which is controlled by a row address line (10) and a second switching device (16) for allowing or preventing the supply voltage to be provided to the respective portion of the liquid crystal material (18), and Controlled by a column select line (32). This pixel layout and a method of driving the pixel address circuit, including use of a sample and hold circuit, enables a transition of the liquid crystal to the homeotropic or H state to be avoided when the pixel material is desired to remain in the P or FC states between frames, so that the black addressing bar artifact can be avoided.

Abstract: An electronic device (10) comprises an array of pixels (12), arranged in rows and columns (14,16) with row and column address lines (18,20) for addressing each pixel (12). Each row and column address line is connected to two discharge lines (30,32) through a discharge circuit (38). The circuit allows the passage of charge between the address line and the first discharge line (30) when the address line is at a potential below that of the first discharge line, and allows the passage of charge between the address line and the second discharge line (32) when the address line is at a potential above that of the second discharge line. This provides electrostatic discharge protection against an increase or decrease in voltage on the row or column address lines during manufacture of the device. By providing suitable voltages on the two discharge lines during operation of the manufactured device, it is possible to prevent the discharge circuit from operating, thereby saving power.

Abstract: An image sensor comprises rows and columns of pixels. Each pixel comprises an image sensing element and a switching device. The switching device enables a signal of the image sensing element to be provided to the associated column conductor. The switching device has two inputs—a first input defined by the row conductor, and a second input. Two adjacent columns of pixels are associated with each column conductor, and the two columns of pixels between adjacent column conductors are associated with a respective shared control line providing the second input. The switch arrangement with two inputs enables individual pixels to be isolated. The sharing of control lines between pairs of columns of pixels means that each pixel requires the same number of connections as in a conventional array with only a single switch control input.

Abstract: A display device has row driver circuitry (30) providing row address signals and column address circuitry (32) providing pixel drive signals. The row address signals comprise a plurality of voltage levels (V1-V4) to implement a desired drive scheme. The column address circuitry comprises circuitry (70) for generating low voltage representations of at least some of the row address signals. The row address circuitry comprises a conversion circuit (72) for converting the representations into the row address signal levels, at least one of has a high voltage magnitude. The invention provides an architecture which partitions different sections of the row voltage supply circuitry optimally between the row and column drivers. This enables a simplified power supply to be provided which can be made more power efficient.

Abstract: A display device has current-addressed pixels, with the currents being supplied by driver circuitry which comprises a transistor (10) for applying a charging voltage to a switched capacitor arrangement (Ci, S1, S2) arranged to selectively charge and discharge the capacitor (Ci) at a predetermined rate to a charging voltage. A transistor control voltage (Vref) is applied to a control terminal of the transistor which is adjusted depending on the transistor threshold voltage to ensure that the capacitor (Ci) is charged to the charging voltage irrespectively of the value of the threshold voltage. This enables an accurately controllable current to be provided which is used to drive the current-addressed pixels.

Abstract: An image sensor (10) includes an array having an image sensing portion (12) and a control portion (14). Pixels (18) of the image sensing portion and devices (20) of the control circuitry portion each have a diode stack (34) of a back-to-back switching diode (36, 38, 40) and a photodiode (42, 44, 46). The photodiodes of the devices (20) are constantly illuminated in use so that they act as current sources in series with the switching diode. This provides a circuit device which has characteristics enabling its use in control circuitry.

Abstract: A bistable chiral nematic liquid crystal display has pixel address circuits which comprise a first switching device (14) for switching a supply voltage to the remainder of the pixel address circuit and which is controlled by a row address line (10) and a second switching device (16) for allowing or preventing the supply voltage to be provided to the respective portion of the liquid crystal material (18), and controlled by a column select line (20). This pixel layout enables a transition to the H state to be avoided when the material is to remain in the P or FC states, so that the black addressing bar artifact can be avoided.