Abstract: The invention is directed to instrumenting object code of an application and/or an operating system on a target machine so that execution trace data can be generated, collected, and subsequently analyzed for various purposes, such as debugging and performance. Automatic instrumentation may be performed on an application's object code before, during or after linking. A target machine's operating system's object code can be manually or automatically instrumented. By identifying address space switches and thread switches in the operating system's object code, instrumented code can be inserted at locations that enable the execution trace data to be generated. The instrumentation of the operating system and application can enable visibility of total system behavior by enabling generation of trace information sufficient to reconstruct address space switches and context switches.

Abstract: An integrated circuit (IC) having a link layer that (1) simultaneously receives both hardware debug data from on-chip ASIC logic and software debug data from an on-chip programmable processor and (2) serializes the hardware and software debug data streams to generate one or more serialized debug data streams, e.g., containing both hardware and software debug data, for output to off-chip debug testing equipment to support debug testing of both the ASIC logic and the programmable processor. Cross triggering can be implemented on-chip to support simultaneous display of correlated hardware and software debug information on appropriate monitors. The present invention supports debug testing using external debug testing equipment that does not require a hardware logic analyzer.

Abstract: An integrated circuit (IC) having a link layer that (1) simultaneously receives both hardware debug data from on-chip ASIC logic and software debug data from an on-chip programmable processor and (2) serializes the hardware and software debug data streams to generate one or more serialized debug data streams, e.g., containing both hardware and software debug data, for output to off-chip debug testing equipment to support debug testing of both the ASIC logic and the programmable processor. Cross triggering can be implemented on-chip to support simultaneous display of correlated hardware and software debug information on appropriate monitors. The present invention supports debug testing using external debug testing equipment that does not require a hardware logic analyzer.

Abstract: A light pen computer interface system utilizes a coil located externally of the computer's CRT display monitor to sense the magnetic field which provides the raster for the CRT. Vertical and horizontal sync detection circuits receive the sensor coil output and supply vertical and horizontal sync signals to a timing circuit. The timing circuit in response to an output signal from the light pen and the vertical and horizontal sync signals supplies a pen position signal to the computer which is either representative of the x,y coordinates position of the light pen on the CRT screen or representative of the change of x,y coordinates between successive positions of the light pen.