Abstract: A method of controlling a frequency-modulated oscillator 110 of a phase-locked loop circuit 100 is described, wherein the oscillator 110 comprises a bank of capacitors 413. The method comprises the steps of (i) switching a capacitor 414 of the bank of capacitors 413 to change an output frequency 1050 of an output signal 112 of the oscillator 110 from a first frequency 1051 to a second frequency 1052, (ii) determining a frequency information associated with the capacitor 414 and based on at least one of the first frequency 1051 and the second frequency 1052; and (iii) writing the frequency information to a look-up table 224, 225, 226 stored in a control unit 120 of the oscillator 110. A corresponding frequency-modulated oscillator 110 and phase-locked loop circuit 100 are also described.

Abstract: Flow control valves may be positioned downstream of water meters to increase pressure and compress entrained water vapour passing through the meters. However, turbulence within such valves can cause the valve's head to move radially, bending a shaft within the valve which may break. Accordingly, there is provided a flow control valve comprising: a housing having a flow passage; a valve seat defined within the flow passage; a valve head moveable to a closed position to engage the valve seat and seal the flow passage; a shaft secured to the valve head; a support slidingly mounting the shaft within the housing; a spring biasing the valve head to the closed position and configured to maintain the valve head in the closed position until a predetermined pressure is applied; and a guide assembly extending along at least a portion of the flow passage to constrain radial movement of the valve head.

Abstract: Flow control valves may be positioned downstream of water meters to increase pressure and compress entrained water vapour passing through the meters. However, turbulence within such valves can cause the valve's head to move radially, bending a shaft within the valve which may break. Accordingly, there is provided a flow control valve comprising: a housing having a flow passage; a valve seat defined within the flow passage; a valve head moveable to a closed position to engage the valve seat and seal the flow passage; a shaft secured to the valve head; a support slidingly mounting the shaft within the housing; a spring biasing the valve head to the closed position and configured to maintain the valve head in the closed position until a predetermined pressure is applied; and a guide assembly extending along at least a portion of the flow passage to constrain radial movement of the valve head.

Abstract: Flow control valves may be positioned downstream of water meters to increase pressure and compress entrained water vapour passing through the meters. However, turbulence within such valves can cause the valve's head to move radially, bending a shaft within the valve which may break. Accordingly, there is provided a flow control valve comprising: a housing having a flow passage; a valve seat defined within the flow passage; a valve head moveable to a closed position to engage the valve seat and seal the flow passage; a shaft secured to the valve head; a support slidingly mounting the shaft within the housing; a spring biasing the valve head to the closed position and configured to maintain the valve head in the closed position until a predetermined pressure is applied; and a guide assembly extending along at least a portion of the flow passage to constrain radial movement of the valve head.

Abstract: Flow control valves may be positioned downstream of water meters to increase pressure and compress entrained water vapour passing through the meters. However, turbulence within such valves can cause the valve's head to move radially, bending a shaft within the valve which may break. Accordingly, there is provided a flow control valve comprising: a housing having a flow passage; a valve seat defined within the flow passage; a valve head moveable to a closed position to engage the valve seat and seal the flow passage; a shaft secured to the valve head; a support slidingly mounting the shaft within the housing; a spring biasing the valve head to the closed position and configured to maintain the valve head in the closed position until a predetermined pressure is applied; and a guide assembly extending along at least a portion of the flow passage to constrain radial movement of the valve head.

Abstract: Embodiments of a method for operating a charge pump and a charge pump are disclosed. In an embodiment, a method for operating a charge pump involves during a first operating phase of the charge pump, setting a first current source of the charge pump according to a second current source of the charge pump, and, during a second operating phase of the charge pump that is subsequent to the first operating phase, providing current from the first current source to a load of the charge pump.

Abstract: A digitally controlled oscillator comprising a filtering digital to analogue converter, DAC, component and a voltage controlled oscillator, VCO, component comprising at least one control terminal arranged to receive a control voltage output by the DAC component; wherein the DAC component comprises a voltage generation component arranged to generate the control voltage and at least one configurable capacitive load component to which the control voltage is applied such that a filtering bandwidth of the DAC component is configurable by way of the at least one configurable capacitive load component.

Abstract: Embodiments of a method for operating a charge pump and a charge pump are disclosed. In an embodiment, a method for operating a charge pump involves during a first operating phase of the charge pump, setting a first current source of the charge pump according to a second current source of the charge pump, and, during a second operating phase of the charge pump that is subsequent to the first operating phase, providing current from the first current source to a load of the charge pump.

Abstract: Embodiments of a clock synchronization unit of an All Digital Phase-Locked Loop (ADPLL), a successive approximation register (SAR) Time-to-Digital Converter (TDC) of an ADPLL and a method for clock synchronization in an ADPLL are disclosed. In one embodiment, a clock synchronization unit of an ADPLL includes a two-flop synchronizer, a phase frequency detector (PFD) connected to the two-flop synchronizer, and a synchronization control circuit configured to control the two-flop synchronizer and the PFD to perform clock synchronization between a reference clock input signal and a divided clock input signal and to control the two-flop synchronizer and the PFD to replace a performance of the clock synchronization between the reference clock input signal and the divided clock input signal with a PFD operation. Other embodiments are also described.

Abstract: Flow control valves may be positioned downstream of water meters to increase pressure and compress entrained water vapour passing through the meters. However, turbulence within such valves can cause the valve's head to move radially, bending a shaft within the valve which may break. Accordingly, there is provided a flow control valve comprising: a housing having a flow passage; a valve seat defined within the flow passage; a valve head moveable to a closed position to engage the valve seat and seal the flow passage; a shaft secured to the valve head; a support slidingly mounting the shaft within the housing; a spring biasing the valve head to the closed position and configured to maintain the valve head in the closed position until a predetermined pressure is applied; and a guide assembly extending along at least a portion of the flow passage to constrain radial movement of the valve head.

Abstract: A time to digital converter may include a synchronization block configured to output a voltage pulse with duration based on a time difference between a reference oscillating signal and an input oscillating signal; a charge pump arranged to receive the voltage pulse and to convert the voltage pulse into a current pulse; an integrator comprising an integrator capacitor, the integrator being configured to receive the current pulse and integrate the current pulse as a charge on the integrator capacitor, resulting in an integrator output voltage; and a successive approximation register configured to determine the integrator output voltage with respect to a reference voltage by adjusting the charge on the integrator capacitor so as to reduce the integrator output voltage to within a least significant bit (D0) of a reference voltage by successive approximation, and configured to output the determined integrator output voltage as a digital signal.

Abstract: A digitally controlled oscillator comprising a filtering digital to analogue converter, DAC, component and a voltage controlled oscillator, VCO, component comprising at least one control terminal arranged to receive a control voltage output by the DAC component; wherein the DAC component comprises a voltage generation component arranged to generate the control voltage and at least one configurable capacitive load component to which the control voltage is applied such that a filtering bandwidth of the DAC component is configurable by way of the at least one configurable capacitive load component.

Abstract: A hydrogen generator for producing hydrogen and oxygen gases comprising a housing having an electrolyte reservoir and an electrolysis cell, an electrical power source; a plurality of axially spaced-apart alternating positive and negative electrode plates mounted concentrically and separated from each other by a peripheral sealing ring in the electrolysis chamber; a pair of opposite tabs formed on the perimeter of the plates with openings for receiving an electrode support rod therein, positive electrode plates connected to a positive electrode support rod and negative electrode plates connected to a negative electrode support rod for electrically connecting the positive and the negative electrode plates to the power source, and fluid conduits for conveying liquid electrolyte from the reservoir to the electrolysis cell and for conveying hydrogen and oxygen gases from the electrolysis chamber; the electrode plates comprise a titanium plate having a 1-3 micron platinum coating, said plates preferably having a ci

Abstract: A phase locked loop is disclosed having a frequency controlled oscillator, a feedback path, a time to digital converter and a memory. The frequency controlled oscillator comprises a first control input for varying the frequency of the output of the frequency controlled oscillator so as to track a reference frequency and a second control input for modulating the frequency of the output signal so as to produce a chirp. The feedback path is configured to provide an input signal to the time to digital converter, and comprises modulation cancelling module operable to remove the frequency modulation resulting from the second control input from the output signal. The memory stores second control input values that each correspond with a desired chirp frequency and which compensate for non-linearity in the response of the frequency controlled oscillator to the second control input.

Abstract: A sigma delta receiver achieves increased stability and noise reduction. The sigma delta receiver includes a first integrator stage, an isolation stage, a second integrator stage, and a quantization stage. The first integrator stage receives an analog radio frequency (RF) signal from an antenna and generates an analog baseband signal based on the analog RF signal. The isolation stage is coupled to an output of the first integrator stage. The isolation stage receives the analog baseband signal from the first integrator stage and amplifies the analog baseband signal. The second integrator stage is coupled to an output of the isolation stage to receive the analog baseband signal. The second integrator stage further amplifies the analog baseband signal. The quantization stage converts the analog baseband signal to a digital signal, and outputs the digital signal.

Abstract: A phase locked loop is disclosed having a frequency controlled oscillator (42), a feedback path, a time to digital converter (10) and a memory. The frequency controlled oscillator (42) comprises a first control input (135, 136) for varying the frequency of the output (106) of the frequency controlled oscillator (42) so as to track a reference frequency (101) and a second control input (139) for modulating the frequency of the output signal (106) so as to produce a chirp. The feedback path is configured to provide an input signal (107) to the time to digital converter (10), and comprises modulation cancelling module (14) operable to remove the frequency modulation resulting from the second control input (139) from the output signal (106). The memory stores second control input values that each correspond with a desired chirp frequency and which compensate for non-linearity in the response of the frequency controlled oscillator to the second control input (139).

Abstract: A time to digital converter (10) is disclosed.

Abstract: The invention relates to frequency conversion systems, in particular for use as up-converters or down-converters in radiofrequency (RF) receivers or transmitters, exemplary embodiments including a radiofrequency receiver including an RF signal input; a mixing module including a first plurality of IF amplifiers each connected to the RF signal input via a switch; a multi-phase local oscillator signal generator configured to provide a switching signal to each switch; and a summing module configured to receive output signals from each of the IF amplifiers and to provide a second plurality of output IF signals from a weighted sum of the IF amplifier output signals, wherein the second plurality is different to the first plurality.

Abstract: A sigma delta receiver achieves increased stability and noise reduction. The sigma delta receiver includes a first integrator stage, an isolation stage, a second integrator stage, and a quantization stage. The first integrator stage receives an analog radio frequency (RF) signal from an antenna and generates an analog baseband signal based on the analog RF signal. The isolation stage is coupled to an output of the first integrator stage. The isolation stage receives the analog baseband signal from the first integrator stage and amplifies the analog baseband signal. The second integrator stage is coupled to an output of the isolation stage to receive the analog baseband signal. The second integrator stage further amplifies the analog baseband signal. The quantization stage converts the analog baseband signal to a digital signal, and outputs the digital signal.

Abstract: An x-ray system having a C-arm 1 and an associated method are provided. The x-ray system includes at least one adjustment unit for at least one component of the x-ray system that is actively connected to the C-arm. The at least one adjustment unit compensates for a spatial change in position of the component caused by deformation and/or oscillation of the C-arm.