Patents by Inventor Neng-Haung Sheng

Neng-Haung Sheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9584152
    Abstract: A current-steering digital-to-analog converter may include dual current switch modules configured to receive digital input bits representative of desired analog output, and each dual current switch module may be controlled by one of the digital input bits. Each digital input bit may be represented by differential signals. The positive input and the negative input to drive two separate current switches in the dual current switch module may be separated, which may make the switching transition noise generated in the two current switches have a 180 degree phase difference. The output currents of these two current switches may be summed in proper phase to add the in-phase signal currents while canceling out the 180 degree out-of-phase switching noises generated in the two current switches. The 2nd order harmonic distortion and other higher even order harmonic distortions due to the common mode switching noise may be greatly reduced.
    Type: Grant
    Filed: June 17, 2016
    Date of Patent: February 28, 2017
    Assignee: Euvis, Inc.
    Inventors: Neng-Haung Sheng, Cheh-Ming Jeff Liu
  • Patent number: 7023368
    Abstract: A digital-circuit return-to-zero device and method for digital-to-analog conversion is disclosed that uses an internal multiplexer alternatively selecting, or selecting in a scheduled fashion, digital input data and an expansion code. By the using the disclosed multiplexing process, where the expansion code is a null code, the usable analog spectrum of the digital-to-analog converter (DAC) extends beyond that of DACs. With the multiplexing process applied to a complementary interpolation process, the disclosed device is adapted for selective enhancement of the frequency spectrum proximate to the clock frequency. While extending the usable frequency spectrum beyond conventional DACs, the present invention, in its several embodiments, features low complexity and high portability relative to known response expansion solutions.
    Type: Grant
    Filed: August 31, 2004
    Date of Patent: April 4, 2006
    Assignee: Euvis, Inc.
    Inventors: Neng-Haung Sheng, Cheh-Ming Jeff Liu
  • Patent number: 6747511
    Abstract: A distributed amplifier for wide-band, high power application is disclosed. The amplifier consists of an analysis module, a gain module and a synthesis module. In the analysis and synthesis modules, inductors such as transmission lines are connected to gain elements of the gain modules with a newly disclosed “pi” configuration, by which the number of inductors, or transmission lines, is reduced. This invention may be applied to wide-band and high-speed communications.
    Type: Grant
    Filed: May 13, 2002
    Date of Patent: June 8, 2004
    Assignee: Euvis, Inc.
    Inventors: Cheh-Ming Jeff Liu, Neng-Haung Sheng
  • Patent number: 6667661
    Abstract: A laser diode driver circuit is disclosed that uses a cascode output stage having high-impedance load and a matching network for reducing mismatch interference. Due to the high-impedance load, on-chip dummy current is less than that required for laser diode drivers with matched loads. Accordingly, the number of transistors of said output stage can be reduced. Moreover, with an AC-coupled active load circuit replacing the matched resistance of the matching network, the power efficiency is improved. A laser diode driver circuit, in accordance with the present invention, can be applied to an optical transmitter with low power requirement.
    Type: Grant
    Filed: April 19, 2002
    Date of Patent: December 23, 2003
    Assignee: Euvis, Inc.
    Inventors: Cheh-Ming Jeff Liu, Neng-Haung Sheng
  • Patent number: 4670090
    Abstract: A method is disclosed which is capable of producing improved field effect transistors such as high electron mobility transistors and metal semiconductor field effect transistors. The method comprises a dual level photoresist deposition technique on a semiconductor wafer, in conjunction with a double lift-off and dummy gate procedure. In the process, T-bar shaped portions of overlying top and bottom photoresist layers are produced, one of such T-bar shaped portions forming a dummy gate. Metal is then deposited on the upper surface of the T-bar shaped portions and on the exposed surface of the substrate to form a source and a drain. In a first lift-off step the metal on the T-bar shaped portions and the underlying remaining top layer portions, are removed. An inorganic film such as SiO is then deposited on the remaining bottom layer portions and over the metal on the surface of the substrate.
    Type: Grant
    Filed: January 23, 1986
    Date of Patent: June 2, 1987
    Assignee: Rockwell International Corporation
    Inventors: Neng-Haung Sheng, Mau-Chung F. Chang, Chien-Ping Lee