Patents by Inventor Neta Peleg

Neta Peleg has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11809274
    Abstract: Techniques are provided to recover from partial device errors of storage devices in a data storage system. A storage control system manages a storage device which comprises storage capacity that is logically partitioned into segments of equal size. The storage control system groups at least some of the segments of the storage device into a segment group. Each segment of the segment group is configured to store one or more data items and associated metadata items. The storage control system generates a parity data segment based on the segments of the segment group, and persistently stores the parity data segment in association with the segment group. In response to detecting a storage device error associated with a corrupted segment of the segment group, the storage control system utilizes the parity data segment and non-corrupted segments of the segment group to recover at least one missing data item of the corrupted segment.
    Type: Grant
    Filed: April 21, 2021
    Date of Patent: November 7, 2023
    Assignee: EMC IP Holding Company LLC
    Inventors: Doron Tal, Yoav Peled, Itay Keller, Asaf Porath, Neta Peleg
  • Publication number: 20220342758
    Abstract: Techniques are provided to recover from partial device errors of storage devices in a data storage system. A storage control system manages a storage device which comprises storage capacity that is logically partitioned into segments of equal size. The storage control system groups at least some of the segments of the storage device into a segment group. Each segment of the segment group is configured to store one or more data items and associated metadata items. The storage control system generates a parity data segment based on the segments of the segment group, and persistently stores the parity data segment in association with the segment group. In response to detecting a storage device error associated with a corrupted segment of the segment group, the storage control system utilizes the parity data segment and non-corrupted segments of the segment group to recover at least one missing data item of the corrupted segment.
    Type: Application
    Filed: April 21, 2021
    Publication date: October 27, 2022
    Inventors: Doron Tal, Yoav Peled, Itay Keller, Asaf Porath, Neta Peleg
  • Patent number: 11163699
    Abstract: Techniques are provided for managing a least recently used cache using a linked list with a reduced memory footprint. A cache manager receives an I/O request comprising a target address, wherein the cache manager manages a cache memory having a maximum allocated amount of cache entries, and a linked list having a maximum allocated amount of list elements which is less than the maximum allocated amount of cache entries. If the target address does correspond to a cache entry, the cache manager accesses the cache entry to obtain the cache data from cache memory, removes a list element from the linked list, which corresponds to the accessed cache entry, selects an existing cache entry which currently does not have a corresponding list element in the linked list, and adds a list element to a head position of the linked list which corresponds to the selected cache entry.
    Type: Grant
    Filed: March 30, 2020
    Date of Patent: November 2, 2021
    Assignee: EMC IP Holding Company LLC
    Inventors: Itay Keller, Zohar Lapidot, Neta Peleg
  • Patent number: 11144399
    Abstract: Techniques are provided for managing storage device errors during processing of inflight input/output (I/O) operations. A storage control system (e.g., a software-defined storage system) receives an I/O write request which includes data to be written to at least one storage device of a plurality of storage devices managed by the storage control system, and commences a write operation to write the data to the at least one storage device. In response to a storage device I/O error resulting from a failure of the write operation associated with the at least one storage device, the storage control system accesses a logical storage device in a non-volatile system memory device, and writes the data to the logical storage device in the non-volatile system memory device to complete the failed write operation.
    Type: Grant
    Filed: March 27, 2020
    Date of Patent: October 12, 2021
    Assignee: EMC IP Holding Company LLC
    Inventors: Michal Yarimi, Itay Keller, Yuval Miron, Neta Peleg
  • Publication number: 20210303401
    Abstract: Techniques are provided for managing storage device errors during processing of inflight input/output (I/O) operations. A storage control system (e.g., a software-defined storage system) receives an I/O write request which includes data to be written to at least one storage device of a plurality of storage devices managed by the storage control system, and commences a write operation to write the data to the at least one storage device. In response to a storage device I/O error resulting from a failure of the write operation associated with the at least one storage device, the storage control system accesses a logical storage device in a non-volatile system memory device, and writes the data to the logical storage device in the non-volatile system memory device to complete the failed write operation.
    Type: Application
    Filed: March 27, 2020
    Publication date: September 30, 2021
    Inventors: Michal Yarimi, Itay Keller, Yuval Miron, Neta Peleg
  • Publication number: 20210303480
    Abstract: Techniques are provided for managing a least recently used cache using a linked list with a reduced memory footprint. A cache manager receives an I/O request comprising a target address, wherein the cache manager manages a cache memory having a maximum allocated amount of cache entries, and a linked list having a maximum allocated amount of list elements which is less than the maximum allocated amount of cache entries. If the target address does correspond to a cache entry, the cache manager accesses the cache entry to obtain the cache data from cache memory, removes a list element from the linked list, which corresponds to the accessed cache entry, selects an existing cache entry which currently does not have a corresponding list element in the linked list, and adds a list element to a head position of the linked list which corresponds to the selected cache entry.
    Type: Application
    Filed: March 30, 2020
    Publication date: September 30, 2021
    Inventors: Itay Keller, Zohar Lapidot, Neta Peleg