Abstract: In a described example, a circuit includes a synchronization control circuit having a sync input and a sync control output, in which the sync input is coupled to a sync terminal configured to receive an external clock signal. An internal clock generator circuit has a control input and an output. The control input is coupled to the sync control output. An output circuit has first and second signal inputs, a mode control input and a clock output. The first signal input is coupled to the sync input, and the second signal input of the output circuit is coupled to the output of the internal clock generator circuit. The mode control input is coupled to the sync control output, and the clock output adapted to be coupled to a controller.

Abstract: In a described example, a circuit includes a synchronization control circuit having a sync input and a sync control output, in which the sync input is coupled to a sync terminal configured to receive an external clock signal. An internal clock generator circuit has a control input and an output. The control input is coupled to the sync control output. An output circuit has first and second signal inputs, a mode control input and a clock output. The first signal input is coupled to the sync input, and the second signal input of the output circuit is coupled to the output of the internal clock generator circuit. The mode control input is coupled to the sync control output, and the clock output adapted to be coupled to a controller.

Abstract: Aspects of the disclosure provide for a circuit. In at least some examples, the circuit includes a high-side power transistor, a low-side power transistor, a first transistor, a second transistor, and a third transistor. The high-side transistor is adapted to couple between an input node and a switch node. The low-side transistor is coupled between the switch node and ground. The first transistor is adapted to couple between a first node and the switch node. The second transistor is coupled between the first node and an output node. The third transistor is coupled between the first node and ground.

Abstract: Aspects of the disclosure provide for a circuit. In at least some examples, the circuit includes a high-side power transistor, a low-side power transistor, a first transistor, a second transistor, and a third transistor. The high-side transistor is adapted to couple between an input node and a switch node. The low-side transistor is coupled between the switch node and ground. The first transistor is adapted to couple between a first node and the switch node. The second transistor is coupled between the first node and an output node. The third transistor is coupled between the first node and ground.

Abstract: An integrated circuit (IC) comprises an output and a voltage regulator. The voltage regulator comprises an amplifier having a first input coupled to a reference voltage source and a second input coupled to the output, a first resistor coupled to the output and coupled to a ground terminal, a metal oxide semiconductor field effect transistor (MOSFET) having a gate coupled to an output of the amplifier and a drain coupled to the output, and a second resistor coupled to a source of the MOSFET and coupled to the ground terminal.

Abstract: An integrated circuit (IC) comprises an output and a voltage regulator. The voltage regulator comprises an amplifier having a first input coupled to a reference voltage source and a second input coupled to the output, a first resistor coupled to the output and coupled to a ground terminal, a metal oxide semiconductor field effect transistor (MOSFET) having a gate coupled to an output of the amplifier and a drain coupled to the output, and a second resistor coupled to a source of the MOSFET and coupled to the ground terminal.

Abstract: An integrated circuit (IC) comprises an output and a voltage regulator. The voltage regulator comprises an amplifier having a first input coupled to a reference voltage source and a second input coupled to the output, a first resistor coupled to the output and coupled to a ground terminal, a metal oxide semiconductor field effect transistor (MOSFET) having a gate coupled to an output of the amplifier and a drain coupled to the output, and a second resistor coupled to a source of the MOSFET and coupled to the ground terminal.