Patents by Inventor Nguyet-Phuong Nguyen
Nguyet-Phuong Nguyen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8309431Abstract: A method for self-supported transfer of a fine layer, in which at least one species of ions is implanted in a source-substrate at a specified depth in relation to the surface of the source-substrate. A stiffener is applied in intimate contact with the source-substrate and the source-substrate undergoes a heat treatment at a specified temperature during a specified period of time in order to create an embrittled buried area substantially at the specified depth without causing a thin layer, defined between the surface and the embrittled buried layer in relation to the remainder of the source-substrate, to become thermally detached. A controlled localized energy pulse is applied to the source-substrate in order to cause the self-supported detachment of the thin layer.Type: GrantFiled: October 28, 2004Date of Patent: November 13, 2012Assignee: Commissariat a l'Energie AtomiqueInventors: Nguyet-Phuong Nguyen, Ian Cayrefourcq, Christelle Lagahe-Blanchard, Konstantin Bourdelle, Aurélie Tauzin, Franck Fournel
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Patent number: 7871900Abstract: A method for forming a structure is provided and includes implanting an atomic species into a donor substrate having an upper surface at a given depth relative to the upper surface to form an embrittlement zone in the donor substrate, the embrittlement zone defining a removable layer within the donor substrate. The method further includes assembling the upper surface of the donor substrate to a receiver substrate. Additionally, the method includes detaching the removable layer from the donor substrate at the embrittlement zone, thereby forming a detachment surface on the removable layer, by high temperature annealing. The high temperature annealing includes a temperature upgrade phase to a predetermined maximum temperature, maintaining the maximum temperature for a predetermined exposure duration, and a temperature downgrade phase. The maximum temperature and the exposure duration are selected so as to prevent the appearance of significant defects at the detachment surface.Type: GrantFiled: October 16, 2007Date of Patent: January 18, 2011Assignee: S.O.I. Tec Silicon on Insulator TechnologiesInventors: Konstantin Bourdelle, Nguyet-Phuong Nguyen, Walter Schwarzenbach
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Patent number: 7772087Abstract: The invention relates to a method of catastrophic transfer of a thin film including implanting in a source substrate a first species of ions or gas at a given depth and a second species of ions or gas, the first species being adapted to generate defects and the second species being adapted to occupy those defects. The process further includes applying a stiffener in intimate contact with the source substrate, applying a heat treatment to that source substrate, at a given temperature for a given time, so as to create, substantially at the given depth, a buried weakened zone, without initiating the thermal splitting of a thin film, and applying a localized amount of energy, for example mechanical stresses, to that source substrate so as to provoke the catastrophic splitting of a thin film, the thin film having a substantially planar face opposite to the face surface of the source substrate.Type: GrantFiled: October 28, 2004Date of Patent: August 10, 2010Assignees: Commissariat A l'Energie Atomique, S.O.I. Tec Silicon On Insulator TechnologiesInventors: Nguyet-Phuong Nguyen, Ian Cayrefourcq, Christelle Lagahe-Blanchard
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Patent number: 7449394Abstract: Methods for forming a semiconductor structure are described. In an embodiment, the technique includes providing a donor wafer having a first semiconductor layer and a second semiconductor layer on the first layer and having a free surface; coimplanting two different atomic species through the free surface of the second layer to form a zone of weakness zone in the first layer; bonding the free surface of the second layer to a host wafer; and supplying energy to detach at the zone of weakness a semiconductor structure comprising the host wafer, the second layer and a portion of the first layer.Type: GrantFiled: July 11, 2005Date of Patent: November 11, 2008Assignee: S.O.I.Tec Silicon on Insulator TechnologiesInventors: Takeshi Akatsu, Nicolas Daval, Nguyet-Phuong Nguyen, Olivier Rayssac, Konstantin Bourdelle
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Publication number: 20080237804Abstract: A method for forming a structure is provided and includes implanting an atomic species into a donor substrate having an upper surface at a given depth relative to the upper surface to form an embrittlement zone in the donor substrate, the embrittlement zone defining a removable layer within the donor substrate. The method further includes assembling the upper surface of the donor substrate to a receiver substrate. Additionally, the method includes detaching the removable layer from the donor substrate at the embrittlement zone, thereby forming a detachment surface on the removable layer, by high temperature annealing. The high temperature annealing includes a temperature upgrade phase to a predetermined maximum temperature, maintaining the maximum temperature for a predetermined exposure duration, and a temperature downgrade phase. The maximum temperature and the exposure duration are selected so as to prevent the appearance of significant defects at the detachment surface.Type: ApplicationFiled: October 16, 2007Publication date: October 2, 2008Inventors: Konstantin BOURDELLE, Nguyet-Phuong Nguyen, Walter Schwarzenbach
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Patent number: 7326628Abstract: A method for producing a semiconductor structure by conducting controlled co-implanting of at least first and second different atomic species into a donor substrate to create an embrittlement zone which defines a thin layer of donor material to be transferred. Implantation energies are selected so that the first and second species are respectively distributed in the donor wafer according to a repartition profile that presents a spreading zone in which each species is mainly distributed at a maximum concentration peak. The implantation doses and energies of the first and second species are selected such that the second species is implanted deeper in the embrittlement zone than the first species spreading zone. The donor substrate is detached at the embrittlement zone to transfer the thin layer to the support substrate while minimizing blister formation in and surface roughness of the transferred layer.Type: GrantFiled: July 13, 2005Date of Patent: February 5, 2008Assignee: S.O.I.Tec Silicon on Insulator TechnologiesInventors: Nadia Ben Mohamed, Nguyet-Phuong Nguyen, Takeshi Akatsu, Alice Boussagol, Gabriela Suciu
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Publication number: 20070281445Abstract: A method for self-supported transfer of a fine layer, in which at least one species of ions is implanted in a source-substrate at a specified depth in relation to the surface of the source-substrate. A stiffener is applied in intimate contact with the source-substrate and the source-substrate undergoes a heat treatment at a specified temperature during a specified period of time in order to create an embrittled buried area substantially at the specified depth without causing a thin layer, defined between the surface and the embrittled buried layer in relation to the remainder of the source-substrate, to become thermally detached. A controlled localized energy pulse is applied to the source-substrate in order to cause the self-supported detachment of the thin layer.Type: ApplicationFiled: October 28, 2004Publication date: December 6, 2007Inventors: Nguyet-Phuong Nguyen, Ian Cayrefourcq, Christelle Lagahe-Blanchard, Konstantin Bourdelle, Aurelie Tauzin, Franck Fournel
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Patent number: 7285495Abstract: A method for thermally treating a semiconductor layer is described. An embodiment of the technique includes implanting atomic species into a first surface of a donor wafer to form a zone of weakness at a predetermined depth that defines the thickness of a transfer layer, bonding the first surface of the donor wafer to a host wafer, supplying energy to detach the transfer layer from the donor wafer at the zone of weakness, and conducting a recovery operation on the transfer layer. The recovery operation is conducted after detachment but while the layer remains in contact with the donor wafer. The recovery operation includes heat treating the transfer layer for a predetermined duration at a recovery temperature that is lower than a re-adhesion temperature at which the transfer layer would re-adhere to the donor wafer, to improve the crystalline quality and the surface roughness of the transfer layer.Type: GrantFiled: February 16, 2005Date of Patent: October 23, 2007Assignee: S.O.I.Tec Silicon on Insulator TechnologiesInventors: Nicolas Daval, Takeshi Akatsu, Nguyet-Phuong Nguyen
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Patent number: 7282449Abstract: A method for thermally treating a silicon germanium semiconductor layer from a donor wafer is described. An embodiment of the technique includes co-implanting atomic species into a first surface of the donor wafer to form a zone of weakness at a predetermined depth that defines the thickness of a transfer layer, bonding the first surface of the donor wafer to a host wafer, supplying energy to detach the transfer layer from the donor wafer at the zone of weakness, and conducting a recovery operation on the transfer layer. The recovery operation is conducted after detachment but while the layer remains in contact with the donor wafer. The recovery operation includes heat treating the transfer layer for a predetermined duration at a recovery temperature that is lower than a re-adhesion temperature at which the transfer layer would re-adhere to the donor wafer, to improve the crystalline quality and the surface roughness of the transfer layer.Type: GrantFiled: February 17, 2006Date of Patent: October 16, 2007Assignee: S.O.I.Tec Silicon on Insulator TechnologiesInventors: Nicolas Daval, Takeshi Akatsu, Nguyet-Phuong Nguyen
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Patent number: 7276428Abstract: Methods for forming a semiconductor structure are described. In an embodiment, the technique includes providing a donor wafer having a first semiconductor layer and a second semiconductor layer on the first layer and having a free surface, implanting atomic species through the free surface of the second layer to form a zone of weakness zone in the first layer, and bonding the free surface of the second layer to a host wafer. The method also includes supplying energy to detach at the zone of weakness a semiconductor structure comprising the host wafer, the second layer and a portion of the first layer, conducting a bond strengthening step on the structure after detachment at a temperature of less than about 800° C. to improve the strength of the bond between the second layer and the host wafer, and selectively etching the first layer portion to remove it from the structure and to expose a surface of the second layer.Type: GrantFiled: February 16, 2005Date of Patent: October 2, 2007Assignee: S.O.I.Tec Silicon on Insulator TechnologiesInventors: Nicolas Daval, Takeshi Akatsu, Nguyet-Phuong Nguyen, Olivier Rayssac
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Patent number: 7176108Abstract: A method of detaching a thin film from a source substrate comprises the steps of implanting ions or gaseous species in the source substrate so as to form therein a buried zone weakened by the presence of defects; and splitting in the weakened zone leading to the detachment of the thin film from the source substrate. Two species are implanted of which one is adapted to form defects and the other is adapted to occupy those defects, the detachment being made at a temperature lower than that for which detachment could be obtained with solely the dose of the first species.Type: GrantFiled: November 6, 2003Date of Patent: February 13, 2007Inventors: Ian Cayrefourcq, Nadia Ben Mohamed, Christelle Lagahe-Blanchard, Nguyet-Phuong Nguyen
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Publication number: 20060141748Abstract: A method for thermally treating a silicon germanium semiconductor layer from a donor wafer is described. An embodiment of the technique includes co-implanting atomic species into a first surface of the donor wafer to form a zone of weakness at a predetermined depth that defines the thickness of a transfer layer, bonding the first surface of the donor wafer to a host wafer, supplying energy to detach the transfer layer from the donor wafer at the zone of weakness, and conducting a recovery operation on the transfer layer. The recovery operation is conducted after detachment but while the layer remains in contact with the donor wafer. The recovery operation includes heat treating the transfer layer for a predetermined duration at a recovery temperature that is lower than a re-adhesion temperature at which the transfer layer would re-adhere to the donor wafer, to improve the crystalline quality and the surface roughness of the transfer layer.Type: ApplicationFiled: February 17, 2006Publication date: June 29, 2006Inventors: Nicolas Daval, Takeshi Akatsu, Nguyet-Phuong Nguyen
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Publication number: 20060060943Abstract: The invention relates to a method for producing a semiconductor structure which comprises conducting controlled co-implanting of at least first and second different atomic species into a face of donor substrate to create an embrittlement zone which defines a thin layer of donor material to be transferred. This step is conducted by selecting implantation energies so that the coimplanting is made under conditions such that the first and second species are respectively distributed in the donor wafer according to a repartition profile that presents a spreading zone in which each species is mainly distributed and at a maximum concentration peak.Type: ApplicationFiled: July 13, 2005Publication date: March 23, 2006Inventors: Nadia Ben Mohamed, Nguyet-Phuong Nguyen, Takeshi Akatsu, Alice Boussagol, Gabriela Suciu
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Publication number: 20060014363Abstract: A method for forming a structure that includes a layer that is removed from a donor wafer that has a first layer made of a semiconductor material containing germanium. The method includes the steps of forming a weakness zone in the thickness of the first layer; bonding the donor wafer to a host wafer; and supplying energy so as to weaken the donor wafer at the level of the zone of weakness. The zone of weakness is formed by subjecting the donor wafer to a co-implantation of at least two different atomic species, while the bonding is carried out by performing a thermal treatment at a temperature between 300° C. and 400° C. for a duration of from 30 minutes to four hours.Type: ApplicationFiled: September 21, 2005Publication date: January 19, 2006Inventors: Nicolas Daval, Takeshi Akatsu, Nguyet-Phuong Nguyen, Olivier Rayssac, Konstantin Bourdelle
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Publication number: 20050245049Abstract: Methods for forming a semiconductor structure are described. In an embodiment, the technique includes providing a donor wafer having a first semiconductor layer and a second semiconductor layer on the first layer and having a free surface; coimplanting two different atomic species through the free surface of the second layer to form a zone of weakness zone in the first layer; bonding the free surface of the second layer to a host wafer; and supplying energy to detach at the zone of weakness a semiconductor structure comprising the host wafer, the second layer and a portion of the first layer.Type: ApplicationFiled: July 11, 2005Publication date: November 3, 2005Inventors: Takeshi Akatsu, Nicolas Daval, Nguyet-Phuong Nguyen, Olivier Rayssac, Konstantin Bourdelle
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Publication number: 20050196937Abstract: Methods for forming a semiconductor structure are described. In an embodiment, the technique includes providing a donor wafer having a first semiconductor layer and a second semiconductor layer on the first layer and having a free surface, implanting atomic species through the free surface of the second layer to form a zone of weakness zone in the first layer, and bonding the free surface of the second layer to a host wafer. The method also includes supplying energy to detach at the zone of weakness a semiconductor structure comprising the host wafer, the second layer and a portion of the first layer, conducting a bond strengthening step on the structure after detachment at a temperature of less than about 800° C. to improve the strength of the bond between the second layer and the host wafer, and selectively etching the first layer portion to remove it from the structure and to expose a surface of the second layer.Type: ApplicationFiled: February 16, 2005Publication date: September 8, 2005Inventors: Nicolas Daval, Takeshi Akatsu, Nguyet-Phuong Nguyen, Olivier Rayssac
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Publication number: 20050196936Abstract: A method for thermally treating a semiconductor layer is described. An embodiment of the technique includes implanting atomic species into a first surface of a donor wafer to form a zone of weakness at a predetermined depth that defines the thickness of a transfer layer, bonding the first surface of the donor wafer to a host wafer, supplying energy to detach the transfer layer from the donor wafer at the zone of weakness, and conducting a recovery operation on the transfer layer. The recovery operation is conducted after detachment but while the layer remains in contact with the donor wafer. The recovery operation includes heat treating the transfer layer for a predetermined duration at a recovery temperature that is lower than a re-adhesion temperature at which the transfer layer would re-adhere to the donor wafer, to improve the crystalline quality and the surface roughness of the transfer layer.Type: ApplicationFiled: February 16, 2005Publication date: September 8, 2005Inventors: Nicolas Daval, Takeshi Akatsu, Nguyet-Phuong Nguyen
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Publication number: 20050148163Abstract: The invention relates to a method of catastrophic transfer of a thin film including implanting in a source substrate a first species of ions or gas at a given depth and a second species of ions or gas, the first species being adapted to generate defects and the second species being adapted to occupy those defects. The process further includes applying a stiffener in intimate contact with the source substrate, applying a heat treatment to that source substrate, at a given temperature for a given time, so as to create, substantially at the given depth, a buried weakened zone, without initiating the thermal splitting of a thin film, and applying a localized amount of energy, for example mechanical stresses, to that source substrate so as to provoke the catastrophic splitting of a thin film, the thin film having a substantially planar face opposite to the face surface of the source substrate.Type: ApplicationFiled: October 28, 2004Publication date: July 7, 2005Inventors: Nguyet-Phuong Nguyen, Ian Cayrefourcq, Christelle Lagahe-Blanchard
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Publication number: 20040171232Abstract: A method of detaching a thin film from a source substrate comprises the following steps:Type: ApplicationFiled: November 6, 2003Publication date: September 2, 2004Applicants: CEA, SOITECInventors: Ian Cayrefourcq, Nadia Ben Mohamed, Christelle Lagahe-Blanchard, Nguyet-Phuong Nguyen