Patents by Inventor Niall D. O'Connell
Niall D. O'Connell has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11463715Abstract: There is disclosed in one example a video processor, including: an input buffer to receive an input image; a slicer circuit to divide the input image into a plurality of N vertical slices; N parallel input buffers for de-rasterization; N parallel image scalers, wherein each scaler is hardware configured to scale in a raster form, one of the N vertical slices according to an image scaling algorithm; N parallel output buffers for rerasteriztion; and an output multiplexer to combine the scaled vertical slices into a combined scaled output image.Type: GrantFiled: March 17, 2021Date of Patent: October 4, 2022Assignee: Analog Devices International Unlimited CompanyInventors: Anand Venkitasubramani, Bhavana Muralikrishna, Shreeja Sugathan, Niall D. O'Connell
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Publication number: 20210203966Abstract: There is disclosed in one example a video processor, including: an input buffer to receive an input image; a slicer circuit to divide the input image into a plurality of N vertical slices; N parallel input buffers for de-rasterization; N parallel image scalers, wherein each scaler is hardware configured to scale in a raster form, one of the N vertical slices according to an image scaling algorithm; N parallel output buffers for rerasteriztion; and an output multiplexer to combine the scaled vertical slices into a combined scaled output image.Type: ApplicationFiled: March 17, 2021Publication date: July 1, 2021Applicant: Analog Devices International Unlimited CompanyInventors: Anand VENKITASUBRAMANI, Bhavana MURALIKRISHNA, Shreeja SUGATHAN, Niall D. O'Connell
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Patent number: 10972744Abstract: There is disclosed in one example a video processor, including: an input buffer to receive an input image; a slicer circuit to divide the input image into a plurality of N vertical slices; N parallel input buffers for de-rasterization; N parallel image scalers, wherein each scaler is hardware configured to scale in a raster form, one of the N vertical slices according to an image scaling algorithm; N parallel output buffers for rerasteriztion; and an output multiplexer to combine the scaled vertical slices into a combined scaled output image.Type: GrantFiled: November 12, 2018Date of Patent: April 6, 2021Assignee: ANALOG DEVICES INTERNATIONAL UNLIMITED COMPANYInventors: Anand Venkitasubramani, Bhavana Muralikrishna, Shreeja Sugathan, Niall D. O'Connell
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Patent number: 10855951Abstract: Disclosed herein are systems and methods for performing SAG effect compensation on a video signal received over an AC-coupled video link. In one aspect, a method for performing SAF effect compensation includes applying a filter to the received video signal to generate a corrected video signal, where a transfer function of the filter is dependent on a transmission parameter that is based on a plurality of parameters of the AC-coupled link. The method further includes extracting predefined content from the corrected video signal, and adjusting the transmission parameter based on a comparison of the extracted predefined content with certain expected content, so that adjusted transmission parameter can be used for one or more subsequent applications of the filter, thereby realizing an adaptive filter.Type: GrantFiled: October 30, 2018Date of Patent: December 1, 2020Assignee: ANALOG DEVICES GLOBAL UNLIMITED COMPANYInventors: John Cullinane, Pablo Ventura, Niall D. O'Connell, Isaac Molina Hernandez
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Patent number: 10750118Abstract: Disclosed herein are systems and methods for performing DC offset correction of a video signal received over an AC-coupled video link. In one aspect, a transmitter is configured to compute, and provide to a receiver, metadata indicative of a statistical characteristic (e.g., an average or a sum of values) for a group of active pixels of a video signal acquired by a camera. The receiver is configured to compute an analogous statistical characteristic on the video signal received over an AC-coupled video link, and to perform DC offset correction by modifying one or more values of the received video signal based on a comparison of the statistical characteristic computed by the receiver and the one computed by the transmitter and indicated by the received metadata.Type: GrantFiled: September 10, 2019Date of Patent: August 18, 2020Assignee: Analog Devices Global Unlimited CompanyInventors: Isaac Molina Hernandez, Niall D. O'Connell, Sean M. Mullins
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Publication number: 20200154120Abstract: There is disclosed in one example a video processor, including: an input buffer to receive an input image; a slicer circuit to divide the input image into a plurality of N vertical slices; N parallel input buffers for de-rasterization; N parallel image scalers, wherein each scaler is hardware configured to scale in a raster form, one of the N vertical slices according to an image scaling algorithm; N parallel output buffers for rerasteriztion; and an output multiplexer to combine the scaled vertical slices into a combined scaled output image.Type: ApplicationFiled: November 12, 2018Publication date: May 14, 2020Applicant: Analog Devices International Unlimited CompanyInventors: Anand VENKITASUBRAMANI, Bhavana MURALIKRISHNA, Shreeja SUGATHAN, Niall D. O'Connell
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Publication number: 20200137350Abstract: Disclosed herein are systems and methods for performing DC offset correction of a video signal received over an AC-coupled video link. In one aspect, a transmitter is configured to compute, and provide to a receiver, metadata indicative of a statistical characteristic (e.g., an average or a sum of values) for a group of active pixels of a video signal acquired by a camera. The receiver is configured to compute an analogous statistical characteristic on the video signal received over an AC-coupled video link, and to perform DC offset correction by modifying one or more values of the received video signal based on a comparison of the statistical characteristic computed by the receiver and the one computed by the transmitter and indicated by the received metadata.Type: ApplicationFiled: September 10, 2019Publication date: April 30, 2020Applicant: Analog Devices Global Unlimited CompanyInventors: Isaac MOLINA HERNANDEZ, Niall D. O'Connell, Sean M. MULLINS
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Patent number: 10623692Abstract: Disclosed herein are systems and methods for communicating video signals and control data over a HD, wired, AC-coupled video and control link. In one aspect, an example system includes a scheduler that is configured to allocate time slots for exchange of data between a transmitter and a receiver over such a link. The scheduler is configured to, for each of at least one or more video lines of a video frame of a video signal acquired by a camera, allocate a plurality of time slots for transmitting a plurality of video components of said video line from the transmitter to the receiver, allocate one or more time slots for transmitting transmitter control data from the transmitter to the receiver, and allocate one or more time slots for transmitting receiver control data from the receiver to the transmitter.Type: GrantFiled: October 30, 2018Date of Patent: April 14, 2020Assignee: Analog Devices Global Unlimited CompanyInventors: Niall D. O'Connell, John Cullinane, Isaac Molina Hernandez, Pablo Ventura, Alan M. Barry
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Patent number: 10594892Abstract: This disclosure relates generally to communicating video content and other data over networks. An example apparatus includes a transmitter for communicating data via a serial link with a receiver. The transmitter includes an input, an output interface to the serial link, and translation circuitry. The input includes multiple input data lanes and a clock lane, and the input is configured to concurrently receive data on the multiple input data lanes aligned with a clock signal received on the clock lane according to a multi-lane communication protocol. The output interface is a clock-less interface and includes a number of output data lanes less than a number of the multiple input data lanes. The translation circuitry translates the data received according to the multi-lane communication protocol to a serial link communication protocol for transmission on the serial link.Type: GrantFiled: August 24, 2017Date of Patent: March 17, 2020Assignee: Analog Devices GlobalInventors: David O'Neill, Amogh D. Thaly, David Rowe, Niall D. O'Connell, Lucas Valentin Garcia
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Publication number: 20200021775Abstract: Disclosed herein are systems and methods for communicating video signals and control data over a HD, wired, AC-coupled video and control link. In one aspect, an example system includes a scheduler that is configured to allocate time slots for exchange of data between a transmitter and a receiver over such a link. The scheduler is configured to, for each of at least one or more video lines of a video frame of a video signal acquired by a camera, allocate a plurality of time slots for transmitting a plurality of video components of said video line from the transmitter to the receiver, allocate one or more time slots for transmitting transmitter control data from the transmitter to the receiver, and allocate one or more time slots for transmitting receiver control data from the receiver to the transmitter.Type: ApplicationFiled: October 30, 2018Publication date: January 16, 2020Applicant: Analog Devices Global Unlimited CompanyInventors: Niall D. O'Connell, John CULLINANE, Isaac Molina Hernandez, Pablo Ventura, Alan M. BARRY
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Publication number: 20200021776Abstract: Disclosed herein are systems and methods for performing SAG effect compensation on a video signal received over an AC-coupled video link. In one aspect, a method for performing SAF effect compensation includes applying a filter to the received video signal to generate a corrected video signal, where a transfer function of the filter is dependent on a transmission parameter that is based on a plurality of parameters of the AC-coupled link. The method further includes extracting predefined content from the corrected video signal, and adjusting the transmission parameter based on a comparison of the extracted predefined content with certain expected content, so that adjusted transmission parameter can be used for one or more subsequent applications of the filter, thereby realizing an adaptive filter.Type: ApplicationFiled: October 30, 2018Publication date: January 16, 2020Applicant: Analog Devices Global Unlimited CompanyInventors: John CULLINANE, Pablo Ventura, Niall D. O'Connell, Isaac Molina Hernandez
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Patent number: 10462413Abstract: Disclosed herein are systems and methods for performing DC offset correction of a video signal received over an AC-coupled video link. In one aspect, a transmitter is configured to compute, and provide to a receiver, metadata indicative of a statistical characteristic (e.g., an average or a sum of values) for a group of active pixels of a video signal acquired by a camera. The receiver is configured to compute an analogous statistical characteristic on the video signal received over an AC-coupled video link, and to perform DC offset correction by modifying one or more values of the received video signal based on a comparison of the statistical characteristic computed by the receiver and the one computed by the transmitter and indicated by the received metadata.Type: GrantFiled: October 26, 2018Date of Patent: October 29, 2019Assignee: Analog Devices Global Unlimited CompanyInventors: Isaac Molina Hernandez, Niall D. O'Connell, Sean M. Mullins
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Publication number: 20180338063Abstract: This disclosure relates generally to communicating video content and other data over networks. An example apparatus includes a transmitter for communicating data via a serial link with a receiver. The transmitter includes an input, an output interface to the serial link, and translation circuitry. The input includes multiple input data lanes and a clock lane, and the input is configured to concurrently receive data on the multiple input data lanes aligned with a clock signal received on the clock lane according to a multi-lane communication protocol. The output interface is a clock-less interface and includes a number of output data lanes less than a number of the multiple input data lanes. The translation circuitry translates the data received according to the multi-lane communication protocol to a serial link communication protocol for transmission on the serial link.Type: ApplicationFiled: August 24, 2017Publication date: November 22, 2018Inventors: David O'Neill, Amogh D. Thaly, David Rowe, Niall D. O'Connell, Lucas Valentin Garcia