Patents by Inventor Nian Liu

Nian Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11984465
    Abstract: The present disclosure relates to a CMOS image sensor having a multiple deep trench isolation (MDTI) structure, and an associated method of formation. In some embodiments, the image sensor comprises a boundary deep trench isolation (BDTI) structure disposed at boundary regions of a pixel region surrounding a photodiode. The BDTI structure has a ring shape from a top view and two columns surrounding the photodiode with the first depth from a cross-sectional view. A multiple deep trench isolation (MDTI) structure is disposed at inner regions of the pixel region overlying the photodiode, the MDTI structure extending from the back-side of the substrate to a second depth within the substrate smaller than the first depth. The MDTI structure has three columns with the second depth between the two columns of the BDTI structure from the cross-sectional view. The MDTI structure is a continuous integral unit having a ring shape.
    Type: Grant
    Filed: August 9, 2022
    Date of Patent: May 14, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wei Chuang Wu, Ching-Chun Wang, Dun-Nian Yaung, Feng-Chi Hung, Jen-Cheng Liu, Yen-Ting Chiang, Chun-Yuan Chen, Shen-Hui Hong
  • Publication number: 20240154186
    Abstract: A low-voltage lithium battery circuitry includes a busbar, a battery signal transmitter unit, a battery management system, and a lithium battery module connected to the battery management system through the busbar and the battery signal transmitter unit. The lithium battery module is configured to provide energy for an external load and supply power to the battery management system. The battery management system is configured to monitor electrical parameters acquired in the lithium battery module and, when any one of the electrical parameters exceeds a protection threshold range corresponding thereto, perform a protection operation.
    Type: Application
    Filed: January 11, 2024
    Publication date: May 9, 2024
    Inventors: Huan JIANG, Changlai LIU, Shizhong XIA, Nian CHEN
  • Publication number: 20240153979
    Abstract: A method of manufacturing an image sensor structure includes forming an isolation structure in a substrate to divide the substrate into a first region and a second region, forming a first light sensing region in the first region and a second light sensing region in the second region, forming a first gate structure over the first light sensing region and a second gate structure over the second light sensing region, forming gate spacers on sidewalls of the first and second gate structures, and depositing a blocking layer on sidewalls of the gate spacers. The blocking layer has an opening positioned between the first and second gate structures. A source/drain structure is formed directly under the opening in the blocking layer. The method also includes forming an interlayer dielectric layer over the first and second gate structures and the blocking layer.
    Type: Application
    Filed: April 13, 2023
    Publication date: May 9, 2024
    Inventors: Wei Long CHEN, Wen-I HSU, Feng-Chi HUNG, Jen-Cheng LIU, Dun-Nian YAUNG
  • Publication number: 20240151323
    Abstract: A vacuum switching valve and a suction system having the same. The vacuum switching valve comprises: a valve body, comprising a first end and a second end, the second end being provided with an air inlet, an air outlet and a through hole; a valve element movably arranged in the valve body; a cylinder, the cylinder being connected to the first end and the valve element, the cylinder drives the valve element to move in the valve body, to close or open the air inlet; a stopper passing through the through hole, the stopper comprising a third end and a fourth end, the third end being connected to the valve element, the fourth end being located on the side of the through hole away from the valve element.
    Type: Application
    Filed: November 19, 2021
    Publication date: May 9, 2024
    Inventors: XUE-YANG LU, JIN-FENG ZHANG, HUO-ZHONG WU, HAO YANG, SHENG-RONG ZHANG, BEN WU, GUANG-KE SUO, XIAO-JIN ZHONG, NIAN LIU
  • Patent number: 11978758
    Abstract: Methods for forming via last through-vias. A method includes providing an active device wafer having a front side including conductive interconnect material disposed in dielectric layers and having an opposing back side; providing a carrier wafer having through vias filled with an oxide extending from a first surface of the carrier wafer to a second surface of the carrier wafer; bonding the front side of the active device wafer to the second surface of the carrier wafer; etching the oxide in the through vias in the carrier wafer to form through oxide vias; and depositing conductor material into the through oxide vias to form conductors that extend to the active carrier wafer and make electrical contact to the conductive interconnect material. An apparatus includes a carrier wafer with through oxide vias extending through the carrier wafer to an active device wafer bonded to the carrier wafer.
    Type: Grant
    Filed: February 3, 2021
    Date of Patent: May 7, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Szu-Ying Chen, Pao-Tung Chen, Dun-Nian Yaung, Jen-Cheng Liu
  • Publication number: 20240145730
    Abstract: An exemplary embodiment of the present disclosure provides an electrochemical device comprising a tube having an outer surface defining an interior volume of the tube; a first hollow fiber positioned in the interior volume of the tube, the first hollow fiber comprising: a first membrane defining an interior volume of the first hollow fiber; one or more first electrodes positioned in the interior volume of the first hollow fiber; and at least a first portion of a first electrolyte fluid positioned in the interior volume of the first hollow fiber; one or more second electrodes positioned in the interior volume of the tube and outside of the interior volume of the first hollow fiber; and a second electrolyte fluid positioned in the interior volume of the tube and outside of the interior volume of the first hollow fiber. Also disclosed herein are methods of making an electrochemical device.
    Type: Application
    Filed: October 14, 2020
    Publication date: May 2, 2024
    Inventors: Nian Liu, Yutong Wu
  • Patent number: 11973101
    Abstract: An image-sensor device is provided. The image-sensor device includes a semiconductor substrate and a radiation-sensing region in the semiconductor substrate. The image-sensor device also includes a doped isolation region in the semiconductor substrate and a dielectric film extending into the doped isolation region from a surface of the semiconductor substrate. A portion of the doped isolation region is between the dielectric film and the radiation-sensing region.
    Type: Grant
    Filed: May 23, 2022
    Date of Patent: April 30, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Jeng-Shyan Lin, Dun-Nian Yaung, Jen-Cheng Liu, Feng-Chi Hung
  • Publication number: 20240131612
    Abstract: Disclosed are a special tooling and method for electron beam welding of a cavity body and a beam tube of a superconducting niobium cavity. The special tooling includes a first clamping device for fixing a flange and a second clamping device for fixing a semi-cavity body, wherein the first clamping device and the second clamping device are fixedly connected. A pressing ring of the first clamping device is disposed around a beam tube of a superconducting niobium cavity and cooperates with a base plate to clamp and fix the flange. The second clamping device includes clamping arms evenly distributed along a circumference of the semi-cavity body, and each clamping arm includes a second pressing plate axially disposed along the beam tube and a pressing block that is disposed on an end portion of the second pressing plate and fixes an edge of the semi-cavity body.
    Type: Application
    Filed: October 18, 2023
    Publication date: April 25, 2024
    Inventors: Jianguo Ma, Wei Wen, Zhihong Liu, Jia Tao, Zhenfei Liu, Liming Peng, Nian Liu, Jiefeng Wu
  • Publication number: 20240115713
    Abstract: Disclosed are a polyethylene glycol conjugate drug, and a preparation method therefor and the use thereof. Specifically, the present invention relates to a polyethylene glycol conjugate drug represented by formula A or a pharmaceutically acceptable salt thereof, a method for preparing the polyethylene glycol conjugate drug or the pharmaceutically acceptable salt thereof, an intermediate for preparing the polyethylene glycol conjugate drug or the pharmaceutically acceptable salt thereof, a pharmaceutical composition comprising the polyethylene glycol conjugate drug or the pharmaceutically acceptable salt thereof, and the use of the polyethylene glycol conjugate drug or the pharmaceutically acceptable salt thereof in the preparation of a drug.
    Type: Application
    Filed: July 21, 2021
    Publication date: April 11, 2024
    Inventors: Gaoquan LI, Nian LIU, Yongchen PENG, Xiafan ZENG, Gang MEI, Sheng GUAN, Yang GAO, Shuai YANG, Yifeng YIN, Jie LOU, Huiyu CHEN, Kun QIAN, Yusong WEI, Qian ZHANG, Dajun LI, Xiaoling DING, Xiangwei YANG, Liqun HUANG, Xi LIU, Liwei LIU, Zhenwei LI, Kaixiong HU, Hua LIU, Tao TU
  • Patent number: 11955428
    Abstract: A semiconductor structure includes a substrate, a conductive via and a first insulation layer. The conductive via is through the substrate. The first insulation layer is between the substrate and the conductive via. A first surface of the first insulation layer facing the substrate and a second surface of the first insulation layer facing the conductive via are extended along different directions.
    Type: Grant
    Filed: February 6, 2021
    Date of Patent: April 9, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Hsin-Hung Chen, Min-Feng Kao, Hsing-Chih Lin, Jen-Cheng Liu, Dun-Nian Yaung
  • Publication number: 20240102256
    Abstract: A foldable windproof unit, a large-span windproof net structure thereof, and a windproof method are disclosed. The foldable windproof unit comprises a flexible windproof net, towers arranged at intervals, and a load-bearing rope erected on the two towers. The tower on one side is provided with a horizontal pulley assembly, and the tower on the other side is provided with two vertical pulleys. The top edge of the flexible windproof net is slidably connected to the load-bearing rope by means of a plurality of hanging structures. The foldable windproof unit further comprises a traction rope, the traction rope is arranged on the horizontal pulley assembly in a sleeving manner, and the two free ends of the traction rope extend to respectively bypass the two vertical pulleys and are connected to winding mechanism. The hanging structure close to the tower on one side is fixedly connected to the traction rope.
    Type: Application
    Filed: November 29, 2022
    Publication date: March 28, 2024
    Applicant: SHIJIAZHUANG TIEDAO UNIVERSITY
    Inventors: Qingkuan LIU, Xiaobing CHAI, Yifei SUN, Zhen LI, Xi WANG, Nian LIU, Yangxue WANG, Xing CHANG, Saifei FU
  • Patent number: 11942368
    Abstract: Methods and devices of having an enclosure structure formed in a multi-layer interconnect and a through-silicon-via (TSV) extending through the enclosure structure. In some implementations, a protection layer is formed between the enclosure structure and the TSV.
    Type: Grant
    Filed: September 2, 2021
    Date of Patent: March 26, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Min-Feng Kao, Hsing-Chih Lin, Jen-Cheng Liu, Dun-Nian Yaung
  • Publication number: 20240096784
    Abstract: Some embodiments of the present disclosure relate to an integrated chip including an extended via that spans a combined height of a wire and a via and that has a smaller footprint than the wire. The extended via may replace a wire and an adjoining via at locations where the sizing and the spacing of the wire are reaching lower limits. Because the extended via has a smaller footprint than the wire, replacing the wire and the adjoining via with the extended via relaxes spacing and allows the size of the pixel to be further reduced. The extended via finds application for capacitor arrays used for pixel circuits.
    Type: Application
    Filed: January 3, 2023
    Publication date: March 21, 2024
    Inventors: Meng-Hsien Lin, Hsing-Chih Lin, Ming-Tsong Wang, Min-Feng Kao, Kuan-Hua Lin, Jen-Cheng Liu, Dun-Nian Yaung, Ko Chun Liu
  • Publication number: 20240097121
    Abstract: The present invention relates to a negative electrode material comprising a hydrogen storage alloy and a coating layer on a surface of the hydrogen storage alloy. Based on the mass of the negative electrode active material, a content of the coating layer is no less than 2 wt %. The coating layer comprises a component shown by a general formula LnFx, wherein Ln is one element selected from the group consisting of La, Ce, Pr, Nd, Pm, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb, Lu, Y, and Sc. The present invention also relates to a preparation method for the above-described negative electrode material. The present invention also relates to a nickel-metal hydride secondary battery using this negative electrode material.
    Type: Application
    Filed: October 11, 2022
    Publication date: March 21, 2024
    Inventors: Jean NEI, Zhitao CHEN, Nian LIU, Mingde WANG, Shuang ZHANG
  • Patent number: 11924255
    Abstract: This application discloses data transmission that includes: dividing to-be-transmitted content into a plurality of data units at a session layer; transmitting the data units to the target terminal device by using a first transmission channel as a responsible channel of the to-be-transmitted content; distributing, by the session layer in a case that the session layer switches the responsible channel of the to-be-transmitted content from the first transmission channel to a second transmission channel with a different transmission protocol, the data units to the second transmission channel; and transmitting the data units distributed by the session layer to the target terminal device through the second transmission channel. In data transmission in this application, the session layer controls switching of the channels and distribution of the data units, so that the transmission sequence is free from constraints of protocols and the degree of freedom in data transmission is increased.
    Type: Grant
    Filed: April 27, 2023
    Date of Patent: March 5, 2024
    Assignee: Tencent Technology (Shenzhen) Company Limited
    Inventors: Rui Han, Honghao Liu, Jianjun Xiao, Fucai Zhang, Nian Wen
  • Patent number: 11923397
    Abstract: The present invention discloses a micro light emitting diode display substrate and a manufacturing method thereof. The substrate includes an underlay substrate, a thin film transistor and a micro light emitting diode disposed on a top surface of the underlay substrate and connected to each other, a first metal film layer disposed on a bottom surface of the underlay substrate and at least formed with fanout circuit pattern and a side printed bonding pad. The fanout circuit pattern is connected to the side printed bonding pad, the side printed bonding pad is connected to the thin film transistor through a side wire such that after the display substrate is assembled with a bezel, a top surface display pixel region can maximally approach the bezel, to achieve bezel-less effect.
    Type: Grant
    Filed: October 20, 2020
    Date of Patent: March 5, 2024
    Assignee: SHENZHEN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD.
    Inventors: Macai Lu, Yong Fan, Minggang Liu, Nian Liu, Jiangbo Yao
  • Patent number: 11915977
    Abstract: A stacked integrated circuit (IC) device and a method are disclosed. The stacked IC device includes a first semiconductor element. The first substrate includes a dielectric block in the first substrate; and a plurality of first conductive features formed in first inter-metal dielectric layers over the first substrate. The stacked IC device also includes a second semiconductor element bonded on the first semiconductor element. The second semiconductor element includes a second substrate and a plurality of second conductive features formed in second inter-metal dielectric layers over the second substrate. The stacked IC device also includes a conductive deep-interconnection-plug coupled between the first conductive features and the second conductive features. The conductive deep-interconnection-plug is isolated by dielectric block, the first inter-metal-dielectric layers and the second inter-metal-dielectric layers.
    Type: Grant
    Filed: April 12, 2021
    Date of Patent: February 27, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Shu-Ting Tsai, Jeng-Shyan Lin, Dun-Nian Yaung, Jen-Cheng Liu, Feng-Chi Hung, Chih-Hui Huang, Sheng-Chau Chen, Shih Pei Chou, Chia-Chieh Lin
  • Publication number: 20240047537
    Abstract: A thin-film transistor (TFT), a display panel, and a manufacturing method of the display panel are provided. The TFT includes: a gate, a gate insulating layer, an active layer, a first electrode, an interlayer insulating layer, and a second electrode. The interlayer insulating layer is disposed between the first electrode and the active layer. A first via is defined on the interlayer insulating layer. The active layer is connected to the first electrode by the first via. A thickness of the interlayer insulating layer is greater than a thickness of the gate insulating layer. The second electrode is connected to the active layer.
    Type: Application
    Filed: September 29, 2021
    Publication date: February 8, 2024
    Applicant: TCL CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Macai Lu, Minggang Liu, Nian Liu
  • Publication number: 20240036230
    Abstract: A method of millimeter-wave human body security checking based on double standing postures is provided, including: scanning and checking a body of a checked person in a first standing posture by using a millimeter-wave human body security detector, so as to obtain a first millimeter-wave human body image; scanning and checking the body of the same checked person in a second standing posture by using the millimeter-wave human body security detector, so as to obtain a second millimeter-wave human body image, wherein the second standing posture is different from the first standing posture (S10); and determining whether the checked person carries contraband based on at least the first millimeter-wave human body image and the second millimeter-wave human body image (S20).
    Type: Application
    Filed: September 18, 2021
    Publication date: February 1, 2024
    Inventors: Yingkang JIN, Pu WANG, Zheng LI, Mengjiao ZHAO, Jiao LONG, Nian LIU, Zhimin ZHENG
  • Publication number: 20240030223
    Abstract: The present invention relates to a display panel and an electronic display device. A first source of a driving thin film transistor extends and covers a first gate layer, the first source is used to block water vapor, thus to prevent water vapor intrusion from reducing weather resistance of the driving thin film transistor, to improve a service life of the driving thin film transistor, and to prevent a degradation or a failure of display qualities caused by a decline during use of the driving thin film transistor, and to improve display stability of the display panel.
    Type: Application
    Filed: September 26, 2021
    Publication date: January 25, 2024
    Applicant: TCL China Star Optoelectronics Technology Co., Ltd.
    Inventors: Macai LU, Nian LIU